ruvector/.github
ruvnet 6176e8f952 fix(ruvllm-esp32): USB-Serial/JTAG VFS + per-toolchain CI matrix; ADR-166 ops manual
Three coordinated fixes from the rc1 device + CI run:

1. **`src/main.rs` — install + use the USB-Serial/JTAG interrupt-mode driver**

   With `CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y` alone, ESP-IDF installs a
   polling-mode driver. Bootloader logs reach `/dev/ttyACM0` but Rust
   `std::io::stdout` / `stderr` / `stdin` do not — TX buffers indefinitely
   until reset, RX returns undefined data. Symptom: panic prints work
   (panic flushes on reboot) but `eprintln!` during steady state goes
   nowhere.

   Fix: at the top of main, call `usb_serial_jtag_driver_install` then
   `esp_vfs_usb_serial_jtag_use_driver`. After both calls, `eprintln!`
   flushes via interrupt-driven TX and `stdin().lock().lines()` blocks
   on USB-CDC RX exactly like host stdio.

   Also drops the FFI-write helpers (`jtag_write` / `jtag_writeln`) in
   favor of std::io. The interactive CLI loop becomes the same shape as
   the host-test path: `for line in stdin.lock().lines() { … }`.

2. **`.github/workflows/ruvllm-esp32-firmware.yml` — per-toolchain matrix +
   ldproxy install**

   rc1 CI matrix failures:
   - all Xtensa builds: `error: linker 'ldproxy' not found` —
     `cargo install espflash --locked` only installs espflash; ldproxy
     was missing.
   - both RISC-V builds (esp32c3, esp32c6): `error: toolchain 'esp' is
     not installed` — `espup install --targets <riscv-chip>` is a no-op
     for the Rust toolchain; the build then ran `cargo +esp build` and
     panicked.

   Fix:
   - Install `ldproxy` and `espflash` together: `cargo install espflash
     ldproxy --locked` (always, both toolchains need it).
   - Per-matrix `toolchain: esp` (Xtensa) vs `nightly` (RISC-V).
   - `if: matrix.toolchain == 'esp'` → espup install path.
   - `if: matrix.toolchain == 'nightly'` → `rustup toolchain install
     nightly --component rust-src`.
   - `cargo +${{ matrix.toolchain }} build …` picks the right channel
     per target.
   - `unset RUSTFLAGS` in the build step (mold doesn't speak Xtensa or
     RISC-V-esp).

3. **`docs/adr/ADR-166-esp32-rust-cross-compile-bringup-ops.md` — full
   operations manual**

   Companion to ADR-165. ADR-165 says *what* runs; ADR-166 says *how* to
   build it. 16 sections, ~14 KB. Captures every failure mode hit during
   rc1 (14 distinct ones), with root cause and fix for each, the pinned
   crate trio (esp-idf-svc 0.51 / esp-idf-hal 0.45 / esp-idf-sys 0.36),
   the per-target toolchain matrix, the build.rs `CARGO_CFG_TARGET_OS`
   pattern, the .cargo/config.toml linker contract, the sdkconfig
   defaults split, the USB-Serial/JTAG console two-call setup, the stack
   budget for TinyAgent, the CI workflow contract, the operational
   acceptance gates G1–G6, and a searchable failure → remedy table.

   Includes a verification log section with the actual rc1 transcripts
   from real ESP32-S3 hardware (`ac:a7:04:e2:66:24`).

Closes:
- rc1 CI failure modes 13 (ldproxy) + 14 (RISC-V toolchain) — workflow fix
- ADR-165 §7 step 5 (USB-CDC console parity) — VFS fix
- Documentation gap so the next contributor doesn't bisect 14 failures

Co-Authored-By: claude-flow <ruv@ruv.net>
2026-04-30 13:28:28 -04:00
..
benchmarks feat: Add Neo4j-compatible hypergraph database package (ruvector-graph) 2025-11-25 23:11:54 +00:00
workflows fix(ruvllm-esp32): USB-Serial/JTAG VFS + per-toolchain CI matrix; ADR-166 ops manual 2026-04-30 13:28:28 -04:00