mirror of
https://github.com/ruvnet/RuVector.git
synced 2026-06-01 14:39:33 +00:00
Introduces a complete temporal tensor compression system with: - ADR-017: SOTA research-backed architecture decision record covering groupwise symmetric quantization, temporal segment reuse, access-pattern driven tier selection (8/7/5/3 bit), and WASM-compatible design - ruvector-temporal-tensor crate (zero external dependencies): - tier_policy: Score-based hot/warm/cold bit-width selection - f16: Software IEEE 754 half-precision conversion - bitpack: Arbitrary bit-width stream packing (no alignment waste) - quantizer: Groupwise symmetric quantization with f16 scales - segment: Binary segment format (TQTC) encode/decode - compressor: Temporal segment manager with drift detection - ffi: WASM/C FFI with handle-based resource management - ruvector-temporal-tensor-wasm crate for wasm32 targets - 33 passing unit tests covering all modules Compression targets: 4x (hot/8-bit), 4.57x (warm/7-bit), 6.4x (warm/5-bit), 10.67x (cold/3-bit) vs f32 baseline. https://claude.ai/code/session_01U63xtGd5Q8mUevyY7nUSfJ |
||
|---|---|---|
| .. | ||
| coherence-engine | ||
| delta-behavior | ||
| ADR-001-ruvector-core-architecture.md | ||
| ADR-002-ruvllm-integration.md | ||
| ADR-003-simd-optimization-strategy.md | ||
| ADR-004-kv-cache-management.md | ||
| ADR-005-wasm-runtime-integration.md | ||
| ADR-006-memory-management.md | ||
| ADR-007-security-review-technical-debt.md | ||
| ADR-008-mistral-rs-integration.md | ||
| ADR-009-structured-output.md | ||
| ADR-010-function-calling.md | ||
| ADR-011-prefix-caching.md | ||
| ADR-012-security-remediation.md | ||
| ADR-013-huggingface-publishing.md | ||
| ADR-014-coherence-engine.md | ||
| ADR-015-coherence-gated-transformer.md | ||
| ADR-016-delta-behavior-ddd-architecture.md | ||
| ADR-017-temporal-tensor-compression.md | ||
| ADR-0027-hnsw-parameterized-query-fix.md | ||