Commit graph

3 commits

Author SHA1 Message Date
rUv
161f890ddb fix: apply cargo fmt across workspace and fix CI issues
- Run cargo fmt --all to fix formatting in 362 files across the entire workspace
- Add PGDG repository for PostgreSQL 17 in CI test-all-features and benchmark jobs
- Add missing rvf dependency crates to standalone Dockerfile for domain-expansion
- Add sona-learning and domain-expansion features to standalone Dockerfile build
- Create npu.rs stub for ruvector-sparse-inference (fixes rustfmt resolution error)

Co-Authored-By: claude-flow <ruv@ruv.net>
2026-02-21 20:56:38 +00:00
rUv
9d79eedec9 perf(sparse-inference): 6x speedup with W2 transpose and SIMD activations
Key optimizations in v0.1.31:
- W2 matrix stored transposed for contiguous row access during sparse accumulation
- SIMD GELU/SiLU using AVX2+FMA polynomial approximations
- Cached SIMD feature detection with OnceLock (eliminates runtime CPUID calls)
- SIMD axpy for vectorized weight accumulation

Benchmark results (512 input, 2048 hidden):
- 10% active: 130µs (83% reduction, 52× vs dense)
- 30% active: 383µs (83% reduction, 18× vs dense)
- 50% active: 651µs (83% reduction, 10× vs dense)
- 70% active: 912µs (83% reduction, 7× vs dense)

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-05 05:07:42 +00:00
rUv
04b26c8d69 feat: Add PowerInfer-style sparse inference engine with precision lanes (#106)
## Summary
- Add PowerInfer-style sparse inference engine with precision lanes
- Add memory module with QuantizedWeights and NeuronCache
- Fix compilation and test issues
- Demonstrated 2.9-8.7x speedup at typical sparsity levels
- Published to crates.io as ruvector-sparse-inference v0.1.30

## Key Features
- Low-rank predictor using P·Q matrix factorization for fast neuron selection
- Sparse FFN kernels that only compute active neurons
- SIMD optimization for AVX2, SSE4.1, NEON, and WASM SIMD
- GGUF parser with full quantization support (Q4_0 through Q6_K)
- Precision lanes (3/5/7-bit layered quantization)
- π integration for low-precision systems

🤖 Generated with [Claude Code](https://claude.com/claude-code)
2026-01-04 23:40:31 -05:00