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feat(ruvllm): zero-copy fused ACT + TTFT/long-decode bench + ADR conclusion
1. act_kernel.rs — zero-copy tensor pointer extraction (no staging memcpy) Candle 0.9 exposes three public hooks that together give raw CUDA device pointers without patching candle: Tensor::device().as_cuda_device() → &CudaDevice CudaDevice::cuda_stream() → Arc<CudaStream> Tensor::storage_and_layout() → (Guard<Storage>, &Layout) CudaStorage::as_cuda_slice<T>() → &CudaSlice<T> DevicePtr::device_ptr(&stream) → (CUdeviceptr, SyncOnDrop) New public utilities in act_kernel.rs: with_tensor_f32_ptr(tensor, |ptr| ...) — callback-based F32 device ptr with_tensor_bf16_ptr(tensor, |ptr| ...) — same for BF16 New struct FusedActZeroCopy: - Shares candle's stream/context (no separate CudaContext) - p tensor and w_out tensor accessed via raw pointers — no H2D/D2H staging - Reduces the 2 staging transfers per ACT step to 0 transfers Remaining limitation: ACT state (cum, not_halted, depth) still on a separate cudarc context. A follow-up can allocate these as Candle tensors to fully unify. Tracked in ADR-258. 2. bench — TTFT and long decode sweep groups New bench groups: cpu/mythos_decode_sweep_f32 — prompt32 TTFT + gen 16/64/128 cuda/mythos_decode_sweep_bf16 — same on CUDA These measure the benchmarks needed to close the ADR-258 "acceptance test": - Time to first token - Tokens/sec at increasing generation lengths 3. ADR-258 — conclusion section + next phase decision matrix Added: - Executive conclusion paragraph (key claim: GPU-resident ACT loop) - P0/P1/P2 priority table (CUDA Graphs, zero-copy, long decode, Flash Attn) - Acceptance test criteria for "SOTA credible" - Required benchmark list (10 items) - Pre-repeated KV buffer rejection rationale added to Alternatives Co-Authored-By: claude-flow <ruv@ruv.net>
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@ -139,6 +139,46 @@ mod candle_bench {
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g.finish();
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}
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// TTFT + long decode benchmarks — measure orchestration overhead at scale.
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// Run: cargo bench --bench recurrent_depth_bench -- "cpu/decode_sweep"
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pub fn bench_mythos_decode_sweep_cpu(c: &mut Criterion) {
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use ruvllm::models::sampling::SamplingConfig;
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let mut g = c.benchmark_group("cpu/mythos_decode_sweep_f32");
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// Use a tighter sample size for long runs to stay under 5 minutes.
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g.sample_size(10);
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let cfg = mythos_cfg();
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let model = rand_mythos_on(cfg.clone(), &Device::Cpu, DType::F32);
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let prompt32: Vec<u32> = (0..32u32).collect();
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// TTFT: time to first token (single decode step from prompt).
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g.bench_function("prompt32_ttft", |b| {
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b.iter(|| {
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let out = model
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.generate(black_box(&prompt32), 1, cfg.max_loop_iters, None)
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.unwrap();
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black_box(out);
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})
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});
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// Throughput at increasing generation lengths.
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for &gen_len in &[16usize, 64, 128] {
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g.bench_with_input(
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BenchmarkId::new("prompt32_gen", gen_len),
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&gen_len,
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|b, &n| {
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b.iter(|| {
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let out = model
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.generate(black_box(&prompt32), n, cfg.max_loop_iters, None)
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.unwrap();
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black_box(out);
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})
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},
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);
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}
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g.finish();
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}
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pub fn bench_rdt_forward_cpu(c: &mut Criterion) {
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let mut g = c.benchmark_group("cpu/rdt_forward_f32");
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let model = rand_rdt_on(rdt_cfg(), &Device::Cpu, DType::F32);
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@ -351,6 +391,47 @@ mod candle_bench {
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g.finish();
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}
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// CUDA long-decode + TTFT sweep (prompt 32, generate 1/16/64/128).
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// Run: cargo bench --features candle,cuda --bench recurrent_depth_bench -- "cuda/decode_sweep"
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#[cfg(feature = "cuda")]
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pub fn bench_mythos_decode_sweep_cuda_bf16(c: &mut Criterion) {
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let dev = cuda_device();
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let cfg = mythos_cfg();
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let model = rand_mythos_on(cfg.clone(), &dev, DType::BF16);
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let prompt32: Vec<u32> = (0..32u32).collect();
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let mut g = c.benchmark_group("cuda/mythos_decode_sweep_bf16");
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g.sample_size(10);
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// TTFT: single decode step from prompt.
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g.bench_function("prompt32_ttft", |b| {
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b.iter(|| {
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let out = model
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.generate(black_box(&prompt32), 1, cfg.max_loop_iters, None)
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.unwrap();
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black_box(out);
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})
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});
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// Throughput at increasing generation lengths.
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for &gen_len in &[16usize, 64, 128] {
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g.bench_with_input(
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BenchmarkId::new("prompt32_gen", gen_len),
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&gen_len,
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|b, &n| {
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b.iter(|| {
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let out = model
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.generate(black_box(&prompt32), n, cfg.max_loop_iters, None)
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.unwrap();
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black_box(out);
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})
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},
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);
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}
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g.finish();
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}
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}
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// CPU criterion groups (always registered)
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@ -360,6 +441,7 @@ criterion_group!(
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candle_bench::bench_mythos_forward_cpu,
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candle_bench::bench_mythos_forward_mla_cpu,
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candle_bench::bench_mythos_decode_cpu,
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candle_bench::bench_mythos_decode_sweep_cpu,
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candle_bench::bench_rdt_forward_cpu,
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);
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@ -370,6 +452,7 @@ criterion_group!(
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candle_bench::bench_mythos_forward_cuda_f32,
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candle_bench::bench_mythos_forward_cuda_bf16,
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candle_bench::bench_mythos_decode_cuda_bf16,
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candle_bench::bench_mythos_decode_sweep_cuda_bf16,
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candle_bench::bench_rdt_forward_cuda_f32,
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candle_bench::bench_rdt_forward_cuda_bf16,
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);
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@ -343,3 +343,178 @@ impl FusedActKernel {
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Ok(v.iter().map(|&d| d as usize).collect())
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}
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}
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// ---------------------------------------------------------------------------
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// Zero-copy path: use candle's public `Tensor::storage_and_layout()` +
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// `CudaDevice::cuda_stream()` to extract raw device pointers without H2D/D2H
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// staging transfers.
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//
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// candle 0.9 public surface used:
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// Tensor::as_cuda_device() → &CudaDevice (device.rs:238)
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// CudaDevice::cuda_stream() → Arc<CudaStream> (device.rs)
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// Tensor::storage_and_layout() → (Guard<Storage>, &Layout)
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// CudaStorage::as_cuda_slice::<T>() → &CudaSlice<T>
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// DevicePtr::device_ptr(&stream) → (CUdeviceptr, SyncOnDrop)
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//
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// No workspace patch to candle is required. The SyncOnDrop guard MUST be
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// kept alive through the kernel launch (it syncs the stream on drop, which
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// ensures the kernel sees the pointer).
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// ---------------------------------------------------------------------------
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/// Call `f(raw_ptr_u64)` with the raw CUDA device pointer for a contiguous
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/// F32 tensor, holding all lifetime guards alive for the duration of the call.
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///
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/// The `SyncOnDrop` guard returned by `device_ptr()` is dropped AFTER `f`
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/// returns — it triggers a stream sync that serializes any downstream reads.
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///
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/// # Safety
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/// Caller must ensure the tensor is contiguous, on CUDA, and dtype F32.
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pub unsafe fn with_tensor_f32_ptr<R, F: FnOnce(u64) -> R>(
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tensor: &Tensor,
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f: F,
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) -> Result<R> {
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use candle_core::Storage;
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use cudarc::driver::DevicePtr;
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let cuda_dev = tensor
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.device()
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.as_cuda_device()
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.map_err(|e| RuvLLMError::Model(format!("not CUDA: {e}")))?;
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let stream = cuda_dev.cuda_stream();
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let (storage, layout) = tensor.storage_and_layout();
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let Storage::Cuda(ref cs) = *storage else {
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return Err(RuvLLMError::Model("tensor not on CUDA device".into()));
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};
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let slice = cs
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.as_cuda_slice::<f32>()
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.map_err(|e| RuvLLMError::Model(format!("dtype: {e}")))?;
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let offset_bytes = (layout.start_offset() * 4) as u64;
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let (base_ptr, _guard) = slice.device_ptr(&stream);
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// f is called before _guard (and storage, stream) are dropped — pointer valid.
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let result = f(base_ptr + offset_bytes);
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// _guard dropped here: syncs stream so downstream operations see the data.
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Ok(result)
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}
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/// Same callback pattern for BF16 tensors (pointer is `*const u16` equivalent).
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pub unsafe fn with_tensor_bf16_ptr<R, F: FnOnce(u64) -> R>(
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tensor: &Tensor,
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f: F,
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) -> Result<R> {
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use candle_core::Storage;
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use cudarc::driver::DevicePtr;
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use half::bf16;
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let cuda_dev = tensor
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.device()
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.as_cuda_device()
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.map_err(|e| RuvLLMError::Model(format!("not CUDA: {e}")))?;
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let stream = cuda_dev.cuda_stream();
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let (storage, layout) = tensor.storage_and_layout();
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let Storage::Cuda(ref cs) = *storage else {
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return Err(RuvLLMError::Model("tensor not on CUDA device".into()));
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};
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let slice = cs
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.as_cuda_slice::<bf16>()
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.map_err(|e| RuvLLMError::Model(format!("dtype: {e}")))?;
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let offset_bytes = (layout.start_offset() * 2) as u64;
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let (base_ptr, _guard) = slice.device_ptr(&stream);
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let result = f(base_ptr + offset_bytes);
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Ok(result)
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}
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/// Zero-copy ACT kernel: `p` and `w_out` are Candle tensors on the same CUDA
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/// device — no H2D/D2H staging copies. State (`cum`, `not_halted`, `depth`)
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/// lives in cudarc `CudaSlice<f32>` buffers on a separate context but the
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/// same physical GPU (device 0).
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///
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/// Returns the weight tensor `w_out` as a pre-allocated Candle tensor that the
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/// caller passes directly to `h.broadcast_mul(&w)`.
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///
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/// # Remaining limitation
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/// The ACT state buffers (`cum`, `not_halted`, `depth`) are still on a separate
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/// cudarc context from candle's tensors. A full zero-copy solution requires
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/// allocating state via candle or unifying contexts — tracked in ADR-258.
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pub struct FusedActZeroCopy {
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kernel: FusedActKernel,
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/// Pre-allocated Candle tensor for `w_out` on the model's CUDA device.
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w_candle: Tensor,
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}
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impl FusedActZeroCopy {
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/// Allocate zero-copy ACT state for `n = b * seq` positions.
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/// `device` must be a CUDA device.
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pub fn new(n: usize, device: &candle_core::Device) -> Result<Self> {
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let kernel = FusedActKernel::new(n)?;
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let w_candle = candle_core::Tensor::zeros((n,), DType::F32, device)
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.map_err(|e| RuvLLMError::Model(format!("w_candle alloc: {e}")))?;
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Ok(Self { kernel, w_candle })
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}
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/// Run one ACT step with zero-copy tensor access for `p`.
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///
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/// `p_tensor`: `[b, seq, 1]` F32 or BF16, must be contiguous, on CUDA.
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/// Returns `w`: the pre-allocated `[n]` F32 Candle tensor (re-used each call).
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pub fn step_zero_copy(
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&mut self,
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p_tensor: &Tensor,
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threshold: f32,
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t: usize,
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) -> Result<&Tensor> {
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let n_i32 = self.kernel.n as i32;
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let step_f32 = (t + 1) as f32;
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let cfg = LaunchConfig::for_num_elems(self.kernel.n as u32);
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// Zero-copy: get raw device pointers directly, no H2D/D2H staging.
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// The callback guards sync their respective streams on return.
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match p_tensor.dtype() {
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DType::F32 => {
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let f = self
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.kernel
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.module
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.load_function("act_fused_step_f32")
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.map_err(|e| RuvLLMError::Model(format!("load_function: {e}")))?;
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let kernel = &mut self.kernel;
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let w_candle = &self.w_candle;
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unsafe {
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with_tensor_f32_ptr(p_tensor, |p_ptr| {
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with_tensor_f32_ptr(w_candle, |w_ptr| {
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kernel
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.stream
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.launch_builder(&f)
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.arg(&p_ptr)
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.arg(&mut kernel.cum)
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.arg(&mut kernel.not_halted)
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.arg(&mut kernel.depth)
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.arg(&w_ptr)
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.arg(&n_i32)
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.arg(&threshold)
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.arg(&step_f32)
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.launch(cfg)
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})
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})
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}
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.map_err(|e| RuvLLMError::Model(format!("zero-copy launch: {e}")))?
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.map_err(|e| RuvLLMError::Model(format!("inner launch: {e}")))?
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.map_err(|e| RuvLLMError::Model(format!("kernel: {e}")))?;
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}
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other => {
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return Err(RuvLLMError::Model(format!(
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"zero-copy ACT: dtype {other:?} not yet supported (add BF16 with_tensor_bf16_ptr)"
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)));
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}
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}
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Ok(&self.w_candle)
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}
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pub fn all_halted(&self) -> Result<bool> {
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self.kernel.all_halted()
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}
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pub fn depths(&self) -> Result<Vec<usize>> {
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self.kernel.depths()
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}
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}
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@ -145,6 +145,58 @@ After PR #589 merged, a `/loop 5m until sota` sweep added the following improvem
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---
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## Conclusion
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ADR-258 demonstrates that recurrent-depth inference becomes practical when the adaptive
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control path remains GPU-resident. The original bottleneck was not the recurrent
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architecture itself, but host-mediated ACT state management, repeated cache concatenation,
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and unnecessary logits transfer during decoding.
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The sweep replaced CPU-side halt tracking with tensorized GPU state, cached static tensors
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at load time, pre-allocated KV buffers using scatter writes, reduced decode transfers, and
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added an optional fused CUDA ACT kernel. On RTX 5080, CUDA BF16 prefill reached **4.2×–21.3×
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speedup** over CPU F32 across OpenMythos GQA and RDT Shared benchmarks. Decode improved more
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modestly (+15% CPU, +9.4% CUDA on prompt-32-gen-16), indicating that decode is now
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increasingly limited by per-token orchestration overhead rather than bandwidth.
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The result validates RDT as a viable local test-time compute primitive. The key claim:
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> **RDT is only slow when the recurrent loop lives on the CPU. Once halt state, depth
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> accounting, KV writes, and sampling stay on GPU, recurrent depth becomes a practical
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> test-time compute primitive for local inference.**
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---
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## Next Phase (priority order)
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| Move | Impact | Risk | Priority |
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|------|-------:|-----:|---------:|
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| CUDA Graph capture for decode | Very high | Medium | P0 |
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| Upstream `Tensor::cuda_device_ptr()` for zero-copy fused ACT | High | Low | P0 |
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| Long decode benchmark suite (gen-128, gen-512, gen-1024, gen-4096) | High | Low | P0 |
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| Flash Attention for seq > 512 | Very high | High | P1 |
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| INT8/INT4 quantization | Very high | High | P1 |
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| Pre-repeated KV buffer (break-even ~1000 tokens) | Medium | Medium | P2 |
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**Acceptance test for "SOTA credible":**
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RTX 5080, same model shape, same prompt set, generate 512 tokens: ruvllm RDT BF16 beats
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baseline Candle transformer by ≥25% tokens/sec at equal or better loss, with no GPU→CPU
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sync in the ACT hot path and no per-token CUDA allocation.
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### Required benchmarks before claiming SOTA vs inference runtimes
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1. TTFT at prompt 32, 128, 512, 2048
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2. Tokens/sec at generate 16, 128, 512, 1024
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3. Peak VRAM per context length
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4. CUDA allocation count per token
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5. Kernel launch count per decode step
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6. ACT average depth distribution across workloads
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7. Accuracy / loss delta between F32, BF16, and fused-ACT paths
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8. Determinism: ≤ 0.01 logit variance across 10 identical runs
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9. Thermal steady state throughput after 10 minutes sustained generation
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---
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## Alternatives Considered
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**Periodic early-exit check (every 4 iterations)**
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@ -153,5 +205,8 @@ Reduces GPU→CPU syncs to ~25% of iterations. Rejected because: (a) it makes te
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**Separate GPU/CPU code paths**
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Maintain the original CPU-only loop and add a GPU-specific branch gated on `device.is_cuda()`. Rejected — the vectorized tensor path works correctly and efficiently on both devices. Duplicating logic would add maintenance burden without measurable CPU benefit.
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**Pre-repeated KV buffer (n_heads-sized)**
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Storing `[b, n_heads, max_seq, head_dim]` (pre-repeated KV) was attempted to eliminate `repeat_kv` per step. Reverted: the larger buffer (4× bigger for n_rep=4) caused a net regression on short generations (≤48 tokens) because allocation cost exceeded savings. Break-even is ~1000 decode tokens. Worth revisiting for long-context workloads.
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**Removing MoE in BF16 path**
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Downgrade MoE to dense FFN when model dtype is non-F32. Rejected — the fix is one line (`.to_dtype(F32)`) and preserves model fidelity.
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