mirror of
https://github.com/Lizonghang/prima.cpp.git
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239 lines
6.8 KiB
C
239 lines
6.8 KiB
C
#ifndef PROFILER_H
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#define PROFILER_H
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#include "ggml.h"
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#include "llama.h"
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#define DISK_TEST_TOTAL_BYTE 500L * 1024 * 1024
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#define DISK_TEST_SEQ_BLOCK 100L * 1024 * 1024
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#define DISK_TEST_RND_BLOCK 4096
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struct cpu_props {
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const char * name;
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const char * description;
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uint32_t cores;
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float flops_f32_f32; // in GFLOPS
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float flops_f16_f32; // in GFLOPS
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float flops_q4k_f32; // in GFLOPS
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float flops_q6k_f32; // in GFLOPS
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float flops_q80_f32; // in GFLOPS
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cpu_props() :
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name(""),
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description(""),
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cores(0),
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flops_f32_f32(0.0f),
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flops_f16_f32(0.0f),
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flops_q4k_f32(0.0f),
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flops_q6k_f32(0.0f),
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flops_q80_f32(0.0f) {}
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};
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struct memory_info {
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float total_physical; // in GiB
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float available_physical; // in GiB
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float total_swap; // in GiB
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float available_swap; // in GiB
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float read_bandwidth; // in GB/s
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memory_info() :
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total_physical (0.0f),
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available_physical(0.0f),
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total_swap (0.0f),
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available_swap (0.0f),
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read_bandwidth (0.0f) {}
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};
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struct gpu_support {
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bool metal;
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bool cuda;
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bool vulkan;
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bool kompute;
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bool gpublas;
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bool blas;
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bool sycl;
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gpu_support() :
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metal (false),
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cuda (false),
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vulkan (false),
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kompute(false),
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gpublas(false),
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blas (false),
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sycl (false) {}
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};
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struct gpu_props {
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const char * name;
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const char * description;
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float memory_free; // in GiB
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float memory_total; // in GiB
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float read_bandwidth; // in GB/s
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float metal_flops_f32_f32; // in GFLOPS
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float metal_flops_f16_f32; // in GFLOPS
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float metal_flops_q4k_f32; // in GFLOPS
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float metal_flops_q6k_f32; // in GFLOPS
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float metal_flops_q80_f32; // in GFLOPS
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float cuda_flops_f32_f32; // in GFLOPS
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float cuda_flops_f16_f32; // in GFLOPS
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float cuda_flops_q4k_f32; // in GFLOPS
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float cuda_flops_q6k_f32; // in GFLOPS
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float cuda_flops_q80_f32; // in GFLOPS
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gpu_props() :
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name(""),
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description(""),
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memory_free (0.0f),
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memory_total (0.0f),
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read_bandwidth (0.0f),
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metal_flops_f32_f32(0.0f),
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metal_flops_f16_f32(0.0f),
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metal_flops_q4k_f32(0.0f),
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metal_flops_q6k_f32(0.0f),
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metal_flops_q80_f32(0.0f),
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cuda_flops_f32_f32 (0.0f),
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cuda_flops_f16_f32 (0.0f),
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cuda_flops_q4k_f32 (0.0f),
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cuda_flops_q6k_f32 (0.0f),
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cuda_flops_q80_f32 (0.0f) {}
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};
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struct model_flops {
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float inp_embd_ms;
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int64_t output_f32_f32;
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int64_t output_f16_f32;
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int64_t output_q4k_f32;
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int64_t output_q6k_f32;
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int64_t output_q80_f32;
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int64_t layer_f32_f32;
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int64_t layer_f16_f32;
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int64_t layer_q4k_f32;
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int64_t layer_q6k_f32;
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int64_t layer_q80_f32;
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model_flops() :
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inp_embd_ms(0.0f),
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output_f32_f32(0),
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output_f16_f32(0),
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output_q4k_f32(0),
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output_q6k_f32(0),
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output_q80_f32(0),
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layer_f32_f32 (0),
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layer_f16_f32 (0),
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layer_q4k_f32 (0),
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layer_q6k_f32 (0),
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layer_q80_f32 (0) {}
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};
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struct model_params {
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int64_t input_f32;
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int64_t input_f16;
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int64_t input_q4k;
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int64_t input_q6k;
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int64_t input_q80;
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int64_t output_f32;
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int64_t output_f16;
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int64_t output_q4k;
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int64_t output_q6k;
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int64_t output_q80;
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int64_t layer_f32;
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int64_t layer_f16;
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int64_t layer_q4k;
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int64_t layer_q6k;
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int64_t layer_q80;
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model_params() :
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input_f32 (0),
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input_f16 (0),
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input_q4k (0),
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input_q6k (0),
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input_q80 (0),
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output_f32(0),
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output_f16(0),
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output_q4k(0),
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output_q6k(0),
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output_q80(0),
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layer_f32 (0),
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layer_f16 (0),
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layer_q4k (0),
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layer_q6k (0),
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layer_q80 (0) {}
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};
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struct disk_props {
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float read_seq_bw; // in GB/s
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float read_rnd_bw; // in GB/s
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float write_seq_bw; // in GB/s
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float write_rnd_bw; // in GB/s
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disk_props() :
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read_seq_bw (0.0f),
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read_rnd_bw (0.0f),
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write_seq_bw(0.0f),
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write_rnd_bw(0.0f) {}
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};
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struct device_info {
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uint32_t rank;
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const char * device_name;
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struct disk_props disk;
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struct cpu_props cpu_props;
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struct memory_info memory;
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struct gpu_support gpu_support;
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struct gpu_props gpu_props;
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struct model_flops model_flops;
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struct model_params model_params;
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device_info() :
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rank(0),
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device_name(""),
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disk(),
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cpu_props(),
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memory(),
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gpu_support(),
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gpu_props(),
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model_flops(),
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model_params() {}
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};
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enum profiler_backend_type {
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PROFILER_BACKEND_TYPE_CPU = 0,
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PROFILER_BACKEND_TYPE_METAL = 1,
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PROFILER_BACKEND_TYPE_CUDA = 2,
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};
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enum profiler_layer_type {
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PROFILER_LAYER_INPUT = 0,
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PROFILER_LAYER_OUTPUT = 1,
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PROFILER_LAYER_BACKEND = 2,
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};
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const char * device_name(void);
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uint32_t device_cpu_cores (void);
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float device_cpu_flops (struct llama_model * model, enum ggml_type src0t, enum ggml_type src1t, int n_threads);
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float device_metal_flops (struct llama_model * model, enum ggml_type src0t, enum ggml_type src1t);
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float device_cuda_flops (struct llama_model * model, enum ggml_type src0t, enum ggml_type src1t);
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float device_inp_embd_delay (struct llama_model * model, enum ggml_type src0t, int n_tokens, int n_threads);
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uint64_t device_physical_memory (bool available);
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uint64_t device_swap_memory (bool available);
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void device_disk_seq_bw (float * read_seq_bw, float * write_seq_bw, int n_threads);
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void device_disk_rnd_bw (float * read_rnd_bw, float * write_rnd_bw, int n_threads);
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float device_memory_bw (int n_thread);
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float device_cuda_memory_bw (struct llama_model * model);
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void device_get_props (struct llama_model * model, int device, struct ggml_backend_dev_props * props);
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void device_print_props (struct device_info * dev_info_set, int n, struct llama_model * model, const struct llama_context_params cparams);
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int device_has_metal (void);
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int device_has_cuda (void);
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int device_has_vulkan (void);
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int device_has_kompute(void);
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int device_has_gpublas(void);
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int device_has_blas (void);
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int device_has_sycl (void);
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size_t serialize (const struct device_info * dev_info, char ** buffer);
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void deserialize(const char * buffer, struct device_info * dev_info);
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#endif // PROFILER_H
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