mirror of
https://github.com/LostRuins/koboldcpp.git
synced 2026-05-05 07:10:41 +00:00
updated vulkan to make use of cm2
This commit is contained in:
parent
40adb8af35
commit
29b57d2175
99 changed files with 96968 additions and 35296 deletions
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@ -20,7 +20,7 @@
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"",
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"MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS",
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"STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND",
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"HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ",
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"HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/",
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"",
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"THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS",
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"OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,",
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@ -80,7 +80,8 @@
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"NZSL": 9,
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"WGSL": 10,
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"Slang": 11,
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"Zig": 12
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"Zig": 12,
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"Rust": 13
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}
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},
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{
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@ -193,6 +194,7 @@
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"EarlyAndLateFragmentTestsAMD": 5017,
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"StencilRefReplacingEXT": 5027,
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"CoalescingAMDX": 5069,
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"IsApiEntryAMDX": 5070,
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"MaxNodeRecursionAMDX": 5071,
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"StaticNumWorkgroupsAMDX": 5072,
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"ShaderIndexAMDX": 5073,
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@ -205,6 +207,7 @@
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"StencilRefLessBackAMD": 5084,
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"QuadDerivativesKHR": 5088,
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"RequireFullQuadsKHR": 5089,
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"SharesInputWithAMDX": 5102,
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"OutputLinesEXT": 5269,
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"OutputLinesNV": 5269,
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"OutputPrimitivesEXT": 5270,
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@ -261,7 +264,6 @@
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"StorageBuffer": 12,
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"TileImageEXT": 4172,
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"NodePayloadAMDX": 5068,
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"NodeOutputPayloadAMDX": 5076,
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"CallableDataKHR": 5328,
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"CallableDataNV": 5328,
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"IncomingCallableDataKHR": 5329,
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@ -575,6 +577,10 @@
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"NodeMaxPayloadsAMDX": 5020,
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"TrackFinishWritingAMDX": 5078,
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"PayloadNodeNameAMDX": 5091,
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"PayloadNodeBaseIndexAMDX": 5098,
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"PayloadNodeSparseArrayAMDX": 5099,
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"PayloadNodeArraySizeAMDX": 5100,
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"PayloadDispatchIndirectAMDX": 5105,
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"OverrideCoverageNV": 5248,
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"PassthroughNV": 5250,
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"ViewportRelativeNV": 5252,
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@ -741,7 +747,7 @@
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"BaryCoordSmoothSampleAMD": 4997,
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"BaryCoordPullModelAMD": 4998,
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"FragStencilRefEXT": 5014,
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"CoalescedInputCountAMDX": 5021,
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"RemainingRecursionLevelsAMDX": 5021,
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"ShaderIndexAMDX": 5073,
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"ViewportMaskNV": 5253,
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"SecondaryPositionNV": 5257,
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@ -801,12 +807,19 @@
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"IncomingRayFlagsKHR": 5351,
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"IncomingRayFlagsNV": 5351,
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"RayGeometryIndexKHR": 5352,
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"HitIsSphereNV": 5359,
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"HitIsLSSNV": 5360,
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"HitSpherePositionNV": 5361,
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"WarpsPerSMNV": 5374,
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"SMCountNV": 5375,
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"WarpIDNV": 5376,
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"SMIDNV": 5377,
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"HitLSSPositionsNV": 5396,
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"HitKindFrontFacingMicroTriangleNV": 5405,
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"HitKindBackFacingMicroTriangleNV": 5406,
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"HitSphereRadiusNV": 5420,
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"HitLSSRadiiNV": 5421,
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"ClusterIDNV": 5436,
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"CullMaskKHR": 6021
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}
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},
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@ -854,6 +867,7 @@
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"DontInline": 1,
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"Pure": 2,
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"Const": 3,
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"OptNoneEXT": 16,
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"OptNoneINTEL": 16
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}
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},
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@ -1137,9 +1151,20 @@
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"ShaderInvocationReorderNV": 5383,
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"BindlessTextureNV": 5390,
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"RayQueryPositionFetchKHR": 5391,
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"CooperativeVectorNV": 5394,
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"AtomicFloat16VectorNV": 5404,
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"RayTracingDisplacementMicromapNV": 5409,
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"RawAccessChainsNV": 5414,
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"RayTracingSpheresGeometryNV": 5418,
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"RayTracingLinearSweptSpheresGeometryNV": 5419,
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"CooperativeMatrixReductionsNV": 5430,
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"CooperativeMatrixConversionsNV": 5431,
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"CooperativeMatrixPerElementOperationsNV": 5432,
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"CooperativeMatrixTensorAddressingNV": 5433,
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"CooperativeMatrixBlockLoadsNV": 5434,
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"CooperativeVectorTrainingNV": 5435,
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"RayTracingClusterAccelerationStructureNV": 5437,
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"TensorAddressingNV": 5439,
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"SubgroupShuffleINTEL": 5568,
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"SubgroupBufferBlockIOINTEL": 5569,
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"SubgroupImageBlockIOINTEL": 5570,
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@ -1199,11 +1224,13 @@
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"AtomicFloat32AddEXT": 6033,
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"AtomicFloat64AddEXT": 6034,
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"LongCompositesINTEL": 6089,
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"OptNoneEXT": 6094,
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"OptNoneINTEL": 6094,
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"AtomicFloat16AddEXT": 6095,
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"DebugInfoModuleINTEL": 6114,
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"BFloat16ConversionINTEL": 6115,
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"SplitBarrierINTEL": 6141,
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"ArithmeticFenceEXT": 6144,
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"FPGAClusterAttributesV2INTEL": 6150,
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"FPGAKernelAttributesv2INTEL": 6161,
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"FPMaxErrorINTEL": 6169,
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@ -1212,6 +1239,10 @@
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"GlobalVariableHostAccessINTEL": 6187,
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"GlobalVariableFPGADecorationsINTEL": 6189,
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"SubgroupBufferPrefetchINTEL": 6220,
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"Subgroup2DBlockIOINTEL": 6228,
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"Subgroup2DBlockTransformINTEL": 6229,
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"Subgroup2DBlockTransposeINTEL": 6230,
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"SubgroupMatrixMultiplyAccumulateINTEL": 6236,
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"GroupUniformArithmeticKHR": 6400,
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"MaskedGatherScatterINTEL": 6427,
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"CacheControlsINTEL": 6441,
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@ -1231,6 +1262,7 @@
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"CullFrontFacingTrianglesKHR": 5,
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"CullOpaqueKHR": 6,
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"CullNoOpaqueKHR": 7,
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"SkipBuiltinPrimitivesNV": 8,
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"SkipTrianglesKHR": 8,
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"SkipAABBsKHR": 9,
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"ForceOpacityMicromap2StateEXT": 10
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@ -1361,6 +1393,37 @@
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"MatrixAccumulatorKHR": 2
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}
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},
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{
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"Name": "CooperativeMatrixReduce",
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"Type": "Bit",
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"Values":
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{
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"Row": 0,
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"Column": 1,
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"CooperativeMatrixReduce2x2": 2
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}
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},
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{
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"Name": "TensorClampMode",
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"Type": "Value",
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"Values":
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{
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"Undefined": 0,
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"Constant": 1,
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"ClampToEdge": 2,
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"Repeat": 3,
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"RepeatMirrored": 4
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}
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},
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{
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"Name": "TensorAddressingOperands",
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"Type": "Bit",
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"Values":
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{
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"TensorView": 0,
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"DecodeFunc": 1
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}
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},
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{
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"Name": "InitializationModeQualifier",
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"Type": "Value",
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@ -1412,6 +1475,27 @@
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"AutoINTEL": 0
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}
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},
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{
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"Name": "MatrixMultiplyAccumulateOperands",
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"Type": "Bit",
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"Values":
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{
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"MatrixASignedComponentsINTEL": 0,
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"MatrixBSignedComponentsINTEL": 1,
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"MatrixCBFloat16INTEL": 2,
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"MatrixResultBFloat16INTEL": 3,
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"MatrixAPackedInt8INTEL": 4,
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"MatrixBPackedInt8INTEL": 5,
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"MatrixAPackedInt4INTEL": 6,
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"MatrixBPackedInt4INTEL": 7,
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"MatrixATF32INTEL": 8,
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"MatrixBTF32INTEL": 9,
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"MatrixAPackedFloat16INTEL": 10,
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"MatrixBPackedFloat16INTEL": 11,
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"MatrixAPackedBFloat16INTEL": 12,
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"MatrixBPackedBFloat16INTEL": 13
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}
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},
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{
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"Name": "RawAccessChainOperands",
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"Type": "Bit",
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@ -1428,6 +1512,39 @@
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{
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}
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},
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{
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"Name": "CooperativeVectorMatrixLayout",
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"Type": "Value",
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"Values":
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{
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"RowMajorNV": 0,
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"ColumnMajorNV": 1,
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"InferencingOptimalNV": 2,
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"TrainingOptimalNV": 3
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}
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},
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{
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"Name": "ComponentType",
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"Type": "Value",
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"Values":
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{
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"Float16NV": 0,
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"Float32NV": 1,
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"Float64NV": 2,
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"SignedInt8NV": 3,
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"SignedInt16NV": 4,
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"SignedInt32NV": 5,
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"SignedInt64NV": 6,
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"UnsignedInt8NV": 7,
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"UnsignedInt16NV": 8,
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"UnsignedInt32NV": 9,
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"UnsignedInt64NV": 10,
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"SignedInt8PackedNV": 1000491000,
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"UnsignedInt8PackedNV": 1000491001,
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"FloatE4M3NV": 1000491002,
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"FloatE5M2NV": 1000491003
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}
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},
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{
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"Name": "Op",
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"Type": "Value",
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"OpFragmentMaskFetchAMD": 5011,
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"OpFragmentFetchAMD": 5012,
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"OpReadClockKHR": 5056,
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"OpFinalizeNodePayloadsAMDX": 5075,
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"OpAllocateNodePayloadsAMDX": 5074,
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"OpEnqueueNodePayloadsAMDX": 5075,
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"OpTypeNodePayloadArrayAMDX": 5076,
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"OpFinishWritingNodePayloadAMDX": 5078,
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"OpInitializeNodePayloadsAMDX": 5090,
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"OpNodePayloadArrayLengthAMDX": 5090,
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"OpIsNodePayloadValidAMDX": 5101,
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"OpConstantStringAMDX": 5103,
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"OpSpecConstantStringAMDX": 5104,
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"OpGroupNonUniformQuadAllKHR": 5110,
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"OpGroupNonUniformQuadAnyKHR": 5111,
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"OpHitObjectRecordHitMotionNV": 5249,
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"OpReorderThreadWithHintNV": 5280,
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"OpTypeHitObjectNV": 5281,
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"OpImageSampleFootprintNV": 5283,
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"OpTypeCooperativeVectorNV": 5288,
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"OpCooperativeVectorMatrixMulNV": 5289,
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"OpCooperativeVectorOuterProductAccumulateNV": 5290,
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"OpCooperativeVectorReduceSumAccumulateNV": 5291,
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"OpCooperativeVectorMatrixMulAddNV": 5292,
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"OpCooperativeMatrixConvertNV": 5293,
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"OpEmitMeshTasksEXT": 5294,
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"OpSetMeshOutputsEXT": 5295,
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"OpGroupNonUniformPartitionNV": 5296,
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"OpWritePackedPrimitiveIndices4x8NV": 5299,
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"OpFetchMicroTriangleVertexPositionNV": 5300,
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"OpFetchMicroTriangleVertexBarycentricNV": 5301,
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"OpCooperativeVectorLoadNV": 5302,
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"OpCooperativeVectorStoreNV": 5303,
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"OpReportIntersectionKHR": 5334,
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"OpReportIntersectionNV": 5334,
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"OpIgnoreIntersectionNV": 5335,
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"OpTypeAccelerationStructureKHR": 5341,
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"OpTypeAccelerationStructureNV": 5341,
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"OpExecuteCallableNV": 5344,
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"OpRayQueryGetClusterIdNV": 5345,
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"OpHitObjectGetClusterIdNV": 5346,
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"OpTypeCooperativeMatrixNV": 5358,
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"OpCooperativeMatrixLoadNV": 5359,
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"OpCooperativeMatrixStoreNV": 5360,
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"OpCooperativeMatrixLengthNV": 5362,
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"OpBeginInvocationInterlockEXT": 5364,
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"OpEndInvocationInterlockEXT": 5365,
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"OpCooperativeMatrixReduceNV": 5366,
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"OpCooperativeMatrixLoadTensorNV": 5367,
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"OpCooperativeMatrixStoreTensorNV": 5368,
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"OpCooperativeMatrixPerElementOpNV": 5369,
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"OpTypeTensorLayoutNV": 5370,
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"OpTypeTensorViewNV": 5371,
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"OpCreateTensorLayoutNV": 5372,
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"OpTensorLayoutSetDimensionNV": 5373,
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"OpTensorLayoutSetStrideNV": 5374,
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"OpTensorLayoutSliceNV": 5375,
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"OpTensorLayoutSetClampValueNV": 5376,
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"OpCreateTensorViewNV": 5377,
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"OpTensorViewSetDimensionNV": 5378,
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"OpTensorViewSetStrideNV": 5379,
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"OpDemoteToHelperInvocation": 5380,
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"OpDemoteToHelperInvocationEXT": 5380,
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"OpIsHelperInvocationEXT": 5381,
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"OpTensorViewSetClipNV": 5382,
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"OpTensorLayoutSetBlockSizeNV": 5384,
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"OpCooperativeMatrixTransposeNV": 5390,
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"OpConvertUToImageNV": 5391,
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"OpConvertUToSamplerNV": 5392,
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"OpConvertImageToUNV": 5393,
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"OpConvertSampledImageToUNV": 5396,
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"OpSamplerImageAddressingModeNV": 5397,
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"OpRawAccessChainNV": 5398,
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"OpRayQueryGetIntersectionSpherePositionNV": 5427,
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"OpRayQueryGetIntersectionSphereRadiusNV": 5428,
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"OpRayQueryGetIntersectionLSSPositionsNV": 5429,
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"OpRayQueryGetIntersectionLSSRadiiNV": 5430,
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"OpRayQueryGetIntersectionLSSHitValueNV": 5431,
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"OpHitObjectGetSpherePositionNV": 5432,
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"OpHitObjectGetSphereRadiusNV": 5433,
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"OpHitObjectGetLSSPositionsNV": 5434,
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"OpHitObjectGetLSSRadiiNV": 5435,
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"OpHitObjectIsSphereHitNV": 5436,
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"OpHitObjectIsLSSHitNV": 5437,
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"OpRayQueryIsSphereHitNV": 5438,
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"OpRayQueryIsLSSHitNV": 5439,
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"OpSubgroupShuffleINTEL": 5571,
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"OpSubgroupShuffleDownINTEL": 5572,
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"OpSubgroupShuffleUpINTEL": 5573,
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"OpConvertBF16ToFINTEL": 6117,
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"OpControlBarrierArriveINTEL": 6142,
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"OpControlBarrierWaitINTEL": 6143,
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"OpArithmeticFenceEXT": 6145,
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"OpSubgroupBlockPrefetchINTEL": 6221,
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"OpSubgroup2DBlockLoadINTEL": 6231,
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"OpSubgroup2DBlockLoadTransformINTEL": 6232,
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"OpSubgroup2DBlockLoadTransposeINTEL": 6233,
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"OpSubgroup2DBlockPrefetchINTEL": 6234,
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"OpSubgroup2DBlockStoreINTEL": 6235,
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"OpSubgroupMatrixMultiplyAccumulateINTEL": 6237,
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"OpGroupIMulKHR": 6401,
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"OpGroupFMulKHR": 6402,
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"OpGroupBitwiseAndKHR": 6403,
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