mirror of
https://github.com/LostRuins/koboldcpp.git
synced 2025-09-11 09:34:37 +00:00
updated vulkan to make use of cm2
This commit is contained in:
parent
40adb8af35
commit
29b57d2175
99 changed files with 96968 additions and 35296 deletions
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@ -12,7 +12,7 @@
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//
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// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
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// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
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// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
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// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
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//
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// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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@ -74,6 +74,7 @@ enum SourceLanguage {
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SourceLanguageWGSL = 10,
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SourceLanguageSlang = 11,
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SourceLanguageZig = 12,
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SourceLanguageRust = 13,
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SourceLanguageMax = 0x7fffffff,
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};
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@ -174,6 +175,7 @@ enum ExecutionMode {
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ExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
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ExecutionModeStencilRefReplacingEXT = 5027,
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ExecutionModeCoalescingAMDX = 5069,
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ExecutionModeIsApiEntryAMDX = 5070,
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ExecutionModeMaxNodeRecursionAMDX = 5071,
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ExecutionModeStaticNumWorkgroupsAMDX = 5072,
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ExecutionModeShaderIndexAMDX = 5073,
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@ -186,6 +188,7 @@ enum ExecutionMode {
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ExecutionModeStencilRefLessBackAMD = 5084,
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ExecutionModeQuadDerivativesKHR = 5088,
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ExecutionModeRequireFullQuadsKHR = 5089,
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ExecutionModeSharesInputWithAMDX = 5102,
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ExecutionModeOutputLinesEXT = 5269,
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ExecutionModeOutputLinesNV = 5269,
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ExecutionModeOutputPrimitivesEXT = 5270,
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@ -239,7 +242,6 @@ enum StorageClass {
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StorageClassStorageBuffer = 12,
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StorageClassTileImageEXT = 4172,
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StorageClassNodePayloadAMDX = 5068,
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StorageClassNodeOutputPayloadAMDX = 5076,
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StorageClassCallableDataKHR = 5328,
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StorageClassCallableDataNV = 5328,
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StorageClassIncomingCallableDataKHR = 5329,
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@ -552,6 +554,10 @@ enum Decoration {
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DecorationNodeMaxPayloadsAMDX = 5020,
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DecorationTrackFinishWritingAMDX = 5078,
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DecorationPayloadNodeNameAMDX = 5091,
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DecorationPayloadNodeBaseIndexAMDX = 5098,
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DecorationPayloadNodeSparseArrayAMDX = 5099,
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DecorationPayloadNodeArraySizeAMDX = 5100,
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DecorationPayloadDispatchIndirectAMDX = 5105,
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DecorationOverrideCoverageNV = 5248,
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DecorationPassthroughNV = 5250,
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DecorationViewportRelativeNV = 5252,
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@ -715,7 +721,7 @@ enum BuiltIn {
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BuiltInBaryCoordSmoothSampleAMD = 4997,
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BuiltInBaryCoordPullModelAMD = 4998,
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BuiltInFragStencilRefEXT = 5014,
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BuiltInCoalescedInputCountAMDX = 5021,
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BuiltInRemainingRecursionLevelsAMDX = 5021,
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BuiltInShaderIndexAMDX = 5073,
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BuiltInViewportMaskNV = 5253,
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BuiltInSecondaryPositionNV = 5257,
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@ -775,12 +781,19 @@ enum BuiltIn {
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BuiltInIncomingRayFlagsKHR = 5351,
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BuiltInIncomingRayFlagsNV = 5351,
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BuiltInRayGeometryIndexKHR = 5352,
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BuiltInHitIsSphereNV = 5359,
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BuiltInHitIsLSSNV = 5360,
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BuiltInHitSpherePositionNV = 5361,
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BuiltInWarpsPerSMNV = 5374,
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BuiltInSMCountNV = 5375,
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BuiltInWarpIDNV = 5376,
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BuiltInSMIDNV = 5377,
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BuiltInHitLSSPositionsNV = 5396,
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BuiltInHitKindFrontFacingMicroTriangleNV = 5405,
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BuiltInHitKindBackFacingMicroTriangleNV = 5406,
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BuiltInHitSphereRadiusNV = 5420,
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BuiltInHitLSSRadiiNV = 5421,
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BuiltInClusterIDNV = 5436,
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BuiltInCullMaskKHR = 6021,
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BuiltInMax = 0x7fffffff,
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};
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@ -848,6 +861,7 @@ enum FunctionControlShift {
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FunctionControlDontInlineShift = 1,
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FunctionControlPureShift = 2,
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FunctionControlConstShift = 3,
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FunctionControlOptNoneEXTShift = 16,
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FunctionControlOptNoneINTELShift = 16,
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FunctionControlMax = 0x7fffffff,
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};
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@ -858,6 +872,7 @@ enum FunctionControlMask {
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FunctionControlDontInlineMask = 0x00000002,
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FunctionControlPureMask = 0x00000004,
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FunctionControlConstMask = 0x00000008,
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FunctionControlOptNoneEXTMask = 0x00010000,
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FunctionControlOptNoneINTELMask = 0x00010000,
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};
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@ -1160,9 +1175,20 @@ enum Capability {
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CapabilityShaderInvocationReorderNV = 5383,
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CapabilityBindlessTextureNV = 5390,
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CapabilityRayQueryPositionFetchKHR = 5391,
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CapabilityCooperativeVectorNV = 5394,
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CapabilityAtomicFloat16VectorNV = 5404,
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CapabilityRayTracingDisplacementMicromapNV = 5409,
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CapabilityRawAccessChainsNV = 5414,
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CapabilityRayTracingSpheresGeometryNV = 5418,
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CapabilityRayTracingLinearSweptSpheresGeometryNV = 5419,
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CapabilityCooperativeMatrixReductionsNV = 5430,
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CapabilityCooperativeMatrixConversionsNV = 5431,
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CapabilityCooperativeMatrixPerElementOperationsNV = 5432,
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CapabilityCooperativeMatrixTensorAddressingNV = 5433,
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CapabilityCooperativeMatrixBlockLoadsNV = 5434,
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CapabilityCooperativeVectorTrainingNV = 5435,
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CapabilityRayTracingClusterAccelerationStructureNV = 5437,
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CapabilityTensorAddressingNV = 5439,
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CapabilitySubgroupShuffleINTEL = 5568,
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CapabilitySubgroupBufferBlockIOINTEL = 5569,
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CapabilitySubgroupImageBlockIOINTEL = 5570,
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@ -1222,11 +1248,13 @@ enum Capability {
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CapabilityAtomicFloat32AddEXT = 6033,
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CapabilityAtomicFloat64AddEXT = 6034,
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CapabilityLongCompositesINTEL = 6089,
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CapabilityOptNoneEXT = 6094,
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CapabilityOptNoneINTEL = 6094,
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CapabilityAtomicFloat16AddEXT = 6095,
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CapabilityDebugInfoModuleINTEL = 6114,
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CapabilityBFloat16ConversionINTEL = 6115,
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CapabilitySplitBarrierINTEL = 6141,
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CapabilityArithmeticFenceEXT = 6144,
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CapabilityFPGAClusterAttributesV2INTEL = 6150,
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CapabilityFPGAKernelAttributesv2INTEL = 6161,
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CapabilityFPMaxErrorINTEL = 6169,
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@ -1235,6 +1263,10 @@ enum Capability {
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CapabilityGlobalVariableHostAccessINTEL = 6187,
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CapabilityGlobalVariableFPGADecorationsINTEL = 6189,
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CapabilitySubgroupBufferPrefetchINTEL = 6220,
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CapabilitySubgroup2DBlockIOINTEL = 6228,
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CapabilitySubgroup2DBlockTransformINTEL = 6229,
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CapabilitySubgroup2DBlockTransposeINTEL = 6230,
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CapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
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CapabilityGroupUniformArithmeticKHR = 6400,
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CapabilityMaskedGatherScatterINTEL = 6427,
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CapabilityCacheControlsINTEL = 6441,
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@ -1251,6 +1283,7 @@ enum RayFlagsShift {
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RayFlagsCullFrontFacingTrianglesKHRShift = 5,
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RayFlagsCullOpaqueKHRShift = 6,
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RayFlagsCullNoOpaqueKHRShift = 7,
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RayFlagsSkipBuiltinPrimitivesNVShift = 8,
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RayFlagsSkipTrianglesKHRShift = 8,
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RayFlagsSkipAABBsKHRShift = 9,
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RayFlagsForceOpacityMicromap2StateEXTShift = 10,
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@ -1267,6 +1300,7 @@ enum RayFlagsMask {
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RayFlagsCullFrontFacingTrianglesKHRMask = 0x00000020,
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RayFlagsCullOpaqueKHRMask = 0x00000040,
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RayFlagsCullNoOpaqueKHRMask = 0x00000080,
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RayFlagsSkipBuiltinPrimitivesNVMask = 0x00000100,
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RayFlagsSkipTrianglesKHRMask = 0x00000100,
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RayFlagsSkipAABBsKHRMask = 0x00000200,
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RayFlagsForceOpacityMicromap2StateEXTMask = 0x00000400,
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@ -1378,6 +1412,41 @@ enum CooperativeMatrixUse {
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CooperativeMatrixUseMax = 0x7fffffff,
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};
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enum CooperativeMatrixReduceShift {
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CooperativeMatrixReduceRowShift = 0,
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CooperativeMatrixReduceColumnShift = 1,
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CooperativeMatrixReduce2x2Shift = 2,
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CooperativeMatrixReduceMax = 0x7fffffff,
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};
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enum CooperativeMatrixReduceMask {
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CooperativeMatrixReduceMaskNone = 0,
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CooperativeMatrixReduceRowMask = 0x00000001,
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CooperativeMatrixReduceColumnMask = 0x00000002,
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CooperativeMatrixReduce2x2Mask = 0x00000004,
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};
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enum TensorClampMode {
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TensorClampModeUndefined = 0,
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TensorClampModeConstant = 1,
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TensorClampModeClampToEdge = 2,
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TensorClampModeRepeat = 3,
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TensorClampModeRepeatMirrored = 4,
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TensorClampModeMax = 0x7fffffff,
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};
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enum TensorAddressingOperandsShift {
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TensorAddressingOperandsTensorViewShift = 0,
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TensorAddressingOperandsDecodeFuncShift = 1,
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TensorAddressingOperandsMax = 0x7fffffff,
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};
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enum TensorAddressingOperandsMask {
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TensorAddressingOperandsMaskNone = 0,
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TensorAddressingOperandsTensorViewMask = 0x00000001,
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TensorAddressingOperandsDecodeFuncMask = 0x00000002,
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};
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enum InitializationModeQualifier {
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InitializationModeQualifierInitOnDeviceReprogramINTEL = 0,
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InitializationModeQualifierInitOnDeviceResetINTEL = 1,
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@ -1414,6 +1483,42 @@ enum NamedMaximumNumberOfRegisters {
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NamedMaximumNumberOfRegistersMax = 0x7fffffff,
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};
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enum MatrixMultiplyAccumulateOperandsShift {
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MatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELShift = 0,
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MatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELShift = 1,
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MatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELShift = 2,
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MatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELShift = 3,
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MatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELShift = 4,
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MatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELShift = 5,
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MatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELShift = 6,
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MatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELShift = 7,
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MatrixMultiplyAccumulateOperandsMatrixATF32INTELShift = 8,
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MatrixMultiplyAccumulateOperandsMatrixBTF32INTELShift = 9,
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MatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELShift = 10,
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MatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELShift = 11,
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MatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELShift = 12,
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MatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELShift = 13,
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MatrixMultiplyAccumulateOperandsMax = 0x7fffffff,
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};
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enum MatrixMultiplyAccumulateOperandsMask {
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MatrixMultiplyAccumulateOperandsMaskNone = 0,
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MatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELMask = 0x00000001,
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MatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELMask = 0x00000002,
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MatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELMask = 0x00000004,
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MatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELMask = 0x00000008,
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MatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELMask = 0x00000010,
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MatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELMask = 0x00000020,
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MatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELMask = 0x00000040,
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MatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELMask = 0x00000080,
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MatrixMultiplyAccumulateOperandsMatrixATF32INTELMask = 0x00000100,
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MatrixMultiplyAccumulateOperandsMatrixBTF32INTELMask = 0x00000200,
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MatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELMask = 0x00000400,
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MatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELMask = 0x00000800,
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MatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELMask = 0x00001000,
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MatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELMask = 0x00002000,
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};
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enum RawAccessChainOperandsShift {
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RawAccessChainOperandsRobustnessPerComponentNVShift = 0,
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RawAccessChainOperandsRobustnessPerElementNVShift = 1,
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@ -1430,6 +1535,33 @@ enum FPEncoding {
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FPEncodingMax = 0x7fffffff,
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};
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enum CooperativeVectorMatrixLayout {
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CooperativeVectorMatrixLayoutRowMajorNV = 0,
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CooperativeVectorMatrixLayoutColumnMajorNV = 1,
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CooperativeVectorMatrixLayoutInferencingOptimalNV = 2,
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CooperativeVectorMatrixLayoutTrainingOptimalNV = 3,
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CooperativeVectorMatrixLayoutMax = 0x7fffffff,
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};
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enum ComponentType {
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ComponentTypeFloat16NV = 0,
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ComponentTypeFloat32NV = 1,
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ComponentTypeFloat64NV = 2,
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ComponentTypeSignedInt8NV = 3,
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ComponentTypeSignedInt16NV = 4,
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ComponentTypeSignedInt32NV = 5,
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ComponentTypeSignedInt64NV = 6,
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ComponentTypeUnsignedInt8NV = 7,
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ComponentTypeUnsignedInt16NV = 8,
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ComponentTypeUnsignedInt32NV = 9,
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ComponentTypeUnsignedInt64NV = 10,
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ComponentTypeSignedInt8PackedNV = 1000491000,
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ComponentTypeUnsignedInt8PackedNV = 1000491001,
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ComponentTypeFloatE4M3NV = 1000491002,
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ComponentTypeFloatE5M2NV = 1000491003,
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ComponentTypeMax = 0x7fffffff,
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};
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enum Op {
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OpNop = 0,
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OpUndef = 1,
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@ -1846,9 +1978,14 @@ enum Op {
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OpFragmentMaskFetchAMD = 5011,
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OpFragmentFetchAMD = 5012,
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OpReadClockKHR = 5056,
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OpFinalizeNodePayloadsAMDX = 5075,
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OpAllocateNodePayloadsAMDX = 5074,
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OpEnqueueNodePayloadsAMDX = 5075,
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OpTypeNodePayloadArrayAMDX = 5076,
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OpFinishWritingNodePayloadAMDX = 5078,
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OpInitializeNodePayloadsAMDX = 5090,
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OpNodePayloadArrayLengthAMDX = 5090,
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OpIsNodePayloadValidAMDX = 5101,
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OpConstantStringAMDX = 5103,
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OpSpecConstantStringAMDX = 5104,
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OpGroupNonUniformQuadAllKHR = 5110,
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OpGroupNonUniformQuadAnyKHR = 5111,
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OpHitObjectRecordHitMotionNV = 5249,
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@ -1885,12 +2022,20 @@ enum Op {
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OpReorderThreadWithHintNV = 5280,
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OpTypeHitObjectNV = 5281,
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OpImageSampleFootprintNV = 5283,
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OpTypeCooperativeVectorNV = 5288,
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OpCooperativeVectorMatrixMulNV = 5289,
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OpCooperativeVectorOuterProductAccumulateNV = 5290,
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OpCooperativeVectorReduceSumAccumulateNV = 5291,
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OpCooperativeVectorMatrixMulAddNV = 5292,
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OpCooperativeMatrixConvertNV = 5293,
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OpEmitMeshTasksEXT = 5294,
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OpSetMeshOutputsEXT = 5295,
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OpGroupNonUniformPartitionNV = 5296,
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OpWritePackedPrimitiveIndices4x8NV = 5299,
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OpFetchMicroTriangleVertexPositionNV = 5300,
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OpFetchMicroTriangleVertexBarycentricNV = 5301,
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OpCooperativeVectorLoadNV = 5302,
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OpCooperativeVectorStoreNV = 5303,
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OpReportIntersectionKHR = 5334,
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OpReportIntersectionNV = 5334,
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OpIgnoreIntersectionNV = 5335,
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@ -1902,6 +2047,8 @@ enum Op {
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OpTypeAccelerationStructureKHR = 5341,
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OpTypeAccelerationStructureNV = 5341,
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OpExecuteCallableNV = 5344,
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OpRayQueryGetClusterIdNV = 5345,
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OpHitObjectGetClusterIdNV = 5346,
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OpTypeCooperativeMatrixNV = 5358,
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OpCooperativeMatrixLoadNV = 5359,
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OpCooperativeMatrixStoreNV = 5360,
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@ -1909,9 +2056,26 @@ enum Op {
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OpCooperativeMatrixLengthNV = 5362,
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OpBeginInvocationInterlockEXT = 5364,
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OpEndInvocationInterlockEXT = 5365,
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OpCooperativeMatrixReduceNV = 5366,
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OpCooperativeMatrixLoadTensorNV = 5367,
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OpCooperativeMatrixStoreTensorNV = 5368,
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OpCooperativeMatrixPerElementOpNV = 5369,
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OpTypeTensorLayoutNV = 5370,
|
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OpTypeTensorViewNV = 5371,
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OpCreateTensorLayoutNV = 5372,
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OpTensorLayoutSetDimensionNV = 5373,
|
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OpTensorLayoutSetStrideNV = 5374,
|
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OpTensorLayoutSliceNV = 5375,
|
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OpTensorLayoutSetClampValueNV = 5376,
|
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OpCreateTensorViewNV = 5377,
|
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OpTensorViewSetDimensionNV = 5378,
|
||||
OpTensorViewSetStrideNV = 5379,
|
||||
OpDemoteToHelperInvocation = 5380,
|
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OpDemoteToHelperInvocationEXT = 5380,
|
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OpIsHelperInvocationEXT = 5381,
|
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OpTensorViewSetClipNV = 5382,
|
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OpTensorLayoutSetBlockSizeNV = 5384,
|
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OpCooperativeMatrixTransposeNV = 5390,
|
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OpConvertUToImageNV = 5391,
|
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OpConvertUToSamplerNV = 5392,
|
||||
OpConvertImageToUNV = 5393,
|
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|
@ -1920,6 +2084,19 @@ enum Op {
|
|||
OpConvertSampledImageToUNV = 5396,
|
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OpSamplerImageAddressingModeNV = 5397,
|
||||
OpRawAccessChainNV = 5398,
|
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OpRayQueryGetIntersectionSpherePositionNV = 5427,
|
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OpRayQueryGetIntersectionSphereRadiusNV = 5428,
|
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OpRayQueryGetIntersectionLSSPositionsNV = 5429,
|
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OpRayQueryGetIntersectionLSSRadiiNV = 5430,
|
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OpRayQueryGetIntersectionLSSHitValueNV = 5431,
|
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OpHitObjectGetSpherePositionNV = 5432,
|
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OpHitObjectGetSphereRadiusNV = 5433,
|
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OpHitObjectGetLSSPositionsNV = 5434,
|
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OpHitObjectGetLSSRadiiNV = 5435,
|
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OpHitObjectIsSphereHitNV = 5436,
|
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OpHitObjectIsLSSHitNV = 5437,
|
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OpRayQueryIsSphereHitNV = 5438,
|
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OpRayQueryIsLSSHitNV = 5439,
|
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OpSubgroupShuffleINTEL = 5571,
|
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OpSubgroupShuffleDownINTEL = 5572,
|
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OpSubgroupShuffleUpINTEL = 5573,
|
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|
@ -2166,7 +2343,14 @@ enum Op {
|
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OpConvertBF16ToFINTEL = 6117,
|
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OpControlBarrierArriveINTEL = 6142,
|
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OpControlBarrierWaitINTEL = 6143,
|
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OpArithmeticFenceEXT = 6145,
|
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OpSubgroupBlockPrefetchINTEL = 6221,
|
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OpSubgroup2DBlockLoadINTEL = 6231,
|
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OpSubgroup2DBlockLoadTransformINTEL = 6232,
|
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OpSubgroup2DBlockLoadTransposeINTEL = 6233,
|
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OpSubgroup2DBlockPrefetchINTEL = 6234,
|
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OpSubgroup2DBlockStoreINTEL = 6235,
|
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OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
|
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OpGroupIMulKHR = 6401,
|
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OpGroupFMulKHR = 6402,
|
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OpGroupBitwiseAndKHR = 6403,
|
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|
@ -2597,9 +2781,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
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case OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break;
|
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case OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break;
|
||||
case OpReadClockKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
||||
case OpAllocateNodePayloadsAMDX: *hasResult = true; *hasResultType = true; break;
|
||||
case OpEnqueueNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
||||
case OpTypeNodePayloadArrayAMDX: *hasResult = true; *hasResultType = false; break;
|
||||
case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
|
||||
case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
||||
case OpNodePayloadArrayLengthAMDX: *hasResult = true; *hasResultType = true; break;
|
||||
case OpIsNodePayloadValidAMDX: *hasResult = true; *hasResultType = true; break;
|
||||
case OpConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
|
||||
case OpSpecConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
|
||||
case OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
|
||||
|
@ -2636,12 +2825,20 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break;
|
||||
case OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTypeCooperativeVectorNV: *hasResult = true; *hasResultType = false; break;
|
||||
case OpCooperativeVectorMatrixMulNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeVectorOuterProductAccumulateNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpCooperativeVectorReduceSumAccumulateNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpCooperativeVectorMatrixMulAddNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeMatrixConvertNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break;
|
||||
case OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeVectorLoadNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeVectorStoreNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpReportIntersectionKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpTerminateRayNV: *hasResult = false; *hasResultType = false; break;
|
||||
|
@ -2651,6 +2848,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTypeAccelerationStructureKHR: *hasResult = true; *hasResultType = false; break;
|
||||
case OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpRayQueryGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break;
|
||||
case OpCooperativeMatrixLoadNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeMatrixStoreNV: *hasResult = false; *hasResultType = false; break;
|
||||
|
@ -2658,8 +2857,25 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
|
||||
case OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
|
||||
case OpCooperativeMatrixReduceNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeMatrixLoadTensorNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeMatrixStoreTensorNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpCooperativeMatrixPerElementOpNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTypeTensorLayoutNV: *hasResult = true; *hasResultType = false; break;
|
||||
case OpTypeTensorViewNV: *hasResult = true; *hasResultType = false; break;
|
||||
case OpCreateTensorLayoutNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorLayoutSetDimensionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorLayoutSetStrideNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorLayoutSliceNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorLayoutSetClampValueNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCreateTensorViewNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorViewSetDimensionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorViewSetStrideNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
|
||||
case OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorViewSetClipNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpTensorLayoutSetBlockSizeNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpCooperativeMatrixTransposeNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
|
||||
|
@ -2668,6 +2884,19 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
|
||||
case OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryGetIntersectionSpherePositionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryGetIntersectionSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryGetIntersectionLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryGetIntersectionLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryGetIntersectionLSSHitValueNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectGetSpherePositionNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectGetSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectGetLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectGetLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpHitObjectIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpRayQueryIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
|
||||
case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
|
@ -2694,7 +2923,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpAsmTargetINTEL: *hasResult = true; *hasResultType = false; break;
|
||||
case OpAsmINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpAsmCallINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpAtomicFMinEXT: *hasResult = true; *hasResultType = true; break;
|
||||
|
@ -2912,7 +3141,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|||
case OpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpArithmeticFenceEXT: *hasResult = true; *hasResultType = true; break;
|
||||
case OpSubgroupBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroup2DBlockLoadINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroup2DBlockLoadTransformINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroup2DBlockLoadTransposeINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
|
||||
case OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
|
||||
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
|
||||
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
|
||||
|
@ -2940,6 +3176,7 @@ inline const char* SourceLanguageToString(SourceLanguage value) {
|
|||
case SourceLanguageWGSL: return "WGSL";
|
||||
case SourceLanguageSlang: return "Slang";
|
||||
case SourceLanguageZig: return "Zig";
|
||||
case SourceLanguageRust: return "Rust";
|
||||
default: return "Unknown";
|
||||
}
|
||||
}
|
||||
|
@ -3040,6 +3277,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) {
|
|||
case ExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD";
|
||||
case ExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
|
||||
case ExecutionModeCoalescingAMDX: return "CoalescingAMDX";
|
||||
case ExecutionModeIsApiEntryAMDX: return "IsApiEntryAMDX";
|
||||
case ExecutionModeMaxNodeRecursionAMDX: return "MaxNodeRecursionAMDX";
|
||||
case ExecutionModeStaticNumWorkgroupsAMDX: return "StaticNumWorkgroupsAMDX";
|
||||
case ExecutionModeShaderIndexAMDX: return "ShaderIndexAMDX";
|
||||
|
@ -3052,6 +3290,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) {
|
|||
case ExecutionModeStencilRefLessBackAMD: return "StencilRefLessBackAMD";
|
||||
case ExecutionModeQuadDerivativesKHR: return "QuadDerivativesKHR";
|
||||
case ExecutionModeRequireFullQuadsKHR: return "RequireFullQuadsKHR";
|
||||
case ExecutionModeSharesInputWithAMDX: return "SharesInputWithAMDX";
|
||||
case ExecutionModeOutputLinesEXT: return "OutputLinesEXT";
|
||||
case ExecutionModeOutputPrimitivesEXT: return "OutputPrimitivesEXT";
|
||||
case ExecutionModeDerivativeGroupQuadsKHR: return "DerivativeGroupQuadsKHR";
|
||||
|
@ -3102,7 +3341,6 @@ inline const char* StorageClassToString(StorageClass value) {
|
|||
case StorageClassStorageBuffer: return "StorageBuffer";
|
||||
case StorageClassTileImageEXT: return "TileImageEXT";
|
||||
case StorageClassNodePayloadAMDX: return "NodePayloadAMDX";
|
||||
case StorageClassNodeOutputPayloadAMDX: return "NodeOutputPayloadAMDX";
|
||||
case StorageClassCallableDataKHR: return "CallableDataKHR";
|
||||
case StorageClassIncomingCallableDataKHR: return "IncomingCallableDataKHR";
|
||||
case StorageClassRayPayloadKHR: return "RayPayloadKHR";
|
||||
|
@ -3354,6 +3592,10 @@ inline const char* DecorationToString(Decoration value) {
|
|||
case DecorationNodeMaxPayloadsAMDX: return "NodeMaxPayloadsAMDX";
|
||||
case DecorationTrackFinishWritingAMDX: return "TrackFinishWritingAMDX";
|
||||
case DecorationPayloadNodeNameAMDX: return "PayloadNodeNameAMDX";
|
||||
case DecorationPayloadNodeBaseIndexAMDX: return "PayloadNodeBaseIndexAMDX";
|
||||
case DecorationPayloadNodeSparseArrayAMDX: return "PayloadNodeSparseArrayAMDX";
|
||||
case DecorationPayloadNodeArraySizeAMDX: return "PayloadNodeArraySizeAMDX";
|
||||
case DecorationPayloadDispatchIndirectAMDX: return "PayloadDispatchIndirectAMDX";
|
||||
case DecorationOverrideCoverageNV: return "OverrideCoverageNV";
|
||||
case DecorationPassthroughNV: return "PassthroughNV";
|
||||
case DecorationViewportRelativeNV: return "ViewportRelativeNV";
|
||||
|
@ -3507,7 +3749,7 @@ inline const char* BuiltInToString(BuiltIn value) {
|
|||
case BuiltInBaryCoordSmoothSampleAMD: return "BaryCoordSmoothSampleAMD";
|
||||
case BuiltInBaryCoordPullModelAMD: return "BaryCoordPullModelAMD";
|
||||
case BuiltInFragStencilRefEXT: return "FragStencilRefEXT";
|
||||
case BuiltInCoalescedInputCountAMDX: return "CoalescedInputCountAMDX";
|
||||
case BuiltInRemainingRecursionLevelsAMDX: return "RemainingRecursionLevelsAMDX";
|
||||
case BuiltInShaderIndexAMDX: return "ShaderIndexAMDX";
|
||||
case BuiltInViewportMaskNV: return "ViewportMaskNV";
|
||||
case BuiltInSecondaryPositionNV: return "SecondaryPositionNV";
|
||||
|
@ -3550,12 +3792,19 @@ inline const char* BuiltInToString(BuiltIn value) {
|
|||
case BuiltInHitMicroTriangleVertexBarycentricsNV: return "HitMicroTriangleVertexBarycentricsNV";
|
||||
case BuiltInIncomingRayFlagsKHR: return "IncomingRayFlagsKHR";
|
||||
case BuiltInRayGeometryIndexKHR: return "RayGeometryIndexKHR";
|
||||
case BuiltInHitIsSphereNV: return "HitIsSphereNV";
|
||||
case BuiltInHitIsLSSNV: return "HitIsLSSNV";
|
||||
case BuiltInHitSpherePositionNV: return "HitSpherePositionNV";
|
||||
case BuiltInWarpsPerSMNV: return "WarpsPerSMNV";
|
||||
case BuiltInSMCountNV: return "SMCountNV";
|
||||
case BuiltInWarpIDNV: return "WarpIDNV";
|
||||
case BuiltInSMIDNV: return "SMIDNV";
|
||||
case BuiltInHitLSSPositionsNV: return "HitLSSPositionsNV";
|
||||
case BuiltInHitKindFrontFacingMicroTriangleNV: return "HitKindFrontFacingMicroTriangleNV";
|
||||
case BuiltInHitKindBackFacingMicroTriangleNV: return "HitKindBackFacingMicroTriangleNV";
|
||||
case BuiltInHitSphereRadiusNV: return "HitSphereRadiusNV";
|
||||
case BuiltInHitLSSRadiiNV: return "HitLSSRadiiNV";
|
||||
case BuiltInClusterIDNV: return "ClusterIDNV";
|
||||
case BuiltInCullMaskKHR: return "CullMaskKHR";
|
||||
default: return "Unknown";
|
||||
}
|
||||
|
@ -3761,9 +4010,20 @@ inline const char* CapabilityToString(Capability value) {
|
|||
case CapabilityShaderInvocationReorderNV: return "ShaderInvocationReorderNV";
|
||||
case CapabilityBindlessTextureNV: return "BindlessTextureNV";
|
||||
case CapabilityRayQueryPositionFetchKHR: return "RayQueryPositionFetchKHR";
|
||||
case CapabilityCooperativeVectorNV: return "CooperativeVectorNV";
|
||||
case CapabilityAtomicFloat16VectorNV: return "AtomicFloat16VectorNV";
|
||||
case CapabilityRayTracingDisplacementMicromapNV: return "RayTracingDisplacementMicromapNV";
|
||||
case CapabilityRawAccessChainsNV: return "RawAccessChainsNV";
|
||||
case CapabilityRayTracingSpheresGeometryNV: return "RayTracingSpheresGeometryNV";
|
||||
case CapabilityRayTracingLinearSweptSpheresGeometryNV: return "RayTracingLinearSweptSpheresGeometryNV";
|
||||
case CapabilityCooperativeMatrixReductionsNV: return "CooperativeMatrixReductionsNV";
|
||||
case CapabilityCooperativeMatrixConversionsNV: return "CooperativeMatrixConversionsNV";
|
||||
case CapabilityCooperativeMatrixPerElementOperationsNV: return "CooperativeMatrixPerElementOperationsNV";
|
||||
case CapabilityCooperativeMatrixTensorAddressingNV: return "CooperativeMatrixTensorAddressingNV";
|
||||
case CapabilityCooperativeMatrixBlockLoadsNV: return "CooperativeMatrixBlockLoadsNV";
|
||||
case CapabilityCooperativeVectorTrainingNV: return "CooperativeVectorTrainingNV";
|
||||
case CapabilityRayTracingClusterAccelerationStructureNV: return "RayTracingClusterAccelerationStructureNV";
|
||||
case CapabilityTensorAddressingNV: return "TensorAddressingNV";
|
||||
case CapabilitySubgroupShuffleINTEL: return "SubgroupShuffleINTEL";
|
||||
case CapabilitySubgroupBufferBlockIOINTEL: return "SubgroupBufferBlockIOINTEL";
|
||||
case CapabilitySubgroupImageBlockIOINTEL: return "SubgroupImageBlockIOINTEL";
|
||||
|
@ -3819,11 +4079,12 @@ inline const char* CapabilityToString(Capability value) {
|
|||
case CapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
|
||||
case CapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
|
||||
case CapabilityLongCompositesINTEL: return "LongCompositesINTEL";
|
||||
case CapabilityOptNoneINTEL: return "OptNoneINTEL";
|
||||
case CapabilityOptNoneEXT: return "OptNoneEXT";
|
||||
case CapabilityAtomicFloat16AddEXT: return "AtomicFloat16AddEXT";
|
||||
case CapabilityDebugInfoModuleINTEL: return "DebugInfoModuleINTEL";
|
||||
case CapabilityBFloat16ConversionINTEL: return "BFloat16ConversionINTEL";
|
||||
case CapabilitySplitBarrierINTEL: return "SplitBarrierINTEL";
|
||||
case CapabilityArithmeticFenceEXT: return "ArithmeticFenceEXT";
|
||||
case CapabilityFPGAClusterAttributesV2INTEL: return "FPGAClusterAttributesV2INTEL";
|
||||
case CapabilityFPGAKernelAttributesv2INTEL: return "FPGAKernelAttributesv2INTEL";
|
||||
case CapabilityFPMaxErrorINTEL: return "FPMaxErrorINTEL";
|
||||
|
@ -3832,6 +4093,10 @@ inline const char* CapabilityToString(Capability value) {
|
|||
case CapabilityGlobalVariableHostAccessINTEL: return "GlobalVariableHostAccessINTEL";
|
||||
case CapabilityGlobalVariableFPGADecorationsINTEL: return "GlobalVariableFPGADecorationsINTEL";
|
||||
case CapabilitySubgroupBufferPrefetchINTEL: return "SubgroupBufferPrefetchINTEL";
|
||||
case CapabilitySubgroup2DBlockIOINTEL: return "Subgroup2DBlockIOINTEL";
|
||||
case CapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
|
||||
case CapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
|
||||
case CapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
|
||||
case CapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
|
||||
case CapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
|
||||
case CapabilityCacheControlsINTEL: return "CacheControlsINTEL";
|
||||
|
@ -3931,6 +4196,17 @@ inline const char* CooperativeMatrixUseToString(CooperativeMatrixUse value) {
|
|||
}
|
||||
}
|
||||
|
||||
inline const char* TensorClampModeToString(TensorClampMode value) {
|
||||
switch (value) {
|
||||
case TensorClampModeUndefined: return "Undefined";
|
||||
case TensorClampModeConstant: return "Constant";
|
||||
case TensorClampModeClampToEdge: return "ClampToEdge";
|
||||
case TensorClampModeRepeat: return "Repeat";
|
||||
case TensorClampModeRepeatMirrored: return "RepeatMirrored";
|
||||
default: return "Unknown";
|
||||
}
|
||||
}
|
||||
|
||||
inline const char* InitializationModeQualifierToString(InitializationModeQualifier value) {
|
||||
switch (value) {
|
||||
case InitializationModeQualifierInitOnDeviceReprogramINTEL: return "InitOnDeviceReprogramINTEL";
|
||||
|
@ -3983,6 +4259,37 @@ inline const char* FPEncodingToString(FPEncoding value) {
|
|||
}
|
||||
}
|
||||
|
||||
inline const char* CooperativeVectorMatrixLayoutToString(CooperativeVectorMatrixLayout value) {
|
||||
switch (value) {
|
||||
case CooperativeVectorMatrixLayoutRowMajorNV: return "RowMajorNV";
|
||||
case CooperativeVectorMatrixLayoutColumnMajorNV: return "ColumnMajorNV";
|
||||
case CooperativeVectorMatrixLayoutInferencingOptimalNV: return "InferencingOptimalNV";
|
||||
case CooperativeVectorMatrixLayoutTrainingOptimalNV: return "TrainingOptimalNV";
|
||||
default: return "Unknown";
|
||||
}
|
||||
}
|
||||
|
||||
inline const char* ComponentTypeToString(ComponentType value) {
|
||||
switch (value) {
|
||||
case ComponentTypeFloat16NV: return "Float16NV";
|
||||
case ComponentTypeFloat32NV: return "Float32NV";
|
||||
case ComponentTypeFloat64NV: return "Float64NV";
|
||||
case ComponentTypeSignedInt8NV: return "SignedInt8NV";
|
||||
case ComponentTypeSignedInt16NV: return "SignedInt16NV";
|
||||
case ComponentTypeSignedInt32NV: return "SignedInt32NV";
|
||||
case ComponentTypeSignedInt64NV: return "SignedInt64NV";
|
||||
case ComponentTypeUnsignedInt8NV: return "UnsignedInt8NV";
|
||||
case ComponentTypeUnsignedInt16NV: return "UnsignedInt16NV";
|
||||
case ComponentTypeUnsignedInt32NV: return "UnsignedInt32NV";
|
||||
case ComponentTypeUnsignedInt64NV: return "UnsignedInt64NV";
|
||||
case ComponentTypeSignedInt8PackedNV: return "SignedInt8PackedNV";
|
||||
case ComponentTypeUnsignedInt8PackedNV: return "UnsignedInt8PackedNV";
|
||||
case ComponentTypeFloatE4M3NV: return "FloatE4M3NV";
|
||||
case ComponentTypeFloatE5M2NV: return "FloatE5M2NV";
|
||||
default: return "Unknown";
|
||||
}
|
||||
}
|
||||
|
||||
inline const char* OpToString(Op value) {
|
||||
switch (value) {
|
||||
case OpNop: return "OpNop";
|
||||
|
@ -4394,9 +4701,14 @@ inline const char* OpToString(Op value) {
|
|||
case OpFragmentMaskFetchAMD: return "OpFragmentMaskFetchAMD";
|
||||
case OpFragmentFetchAMD: return "OpFragmentFetchAMD";
|
||||
case OpReadClockKHR: return "OpReadClockKHR";
|
||||
case OpFinalizeNodePayloadsAMDX: return "OpFinalizeNodePayloadsAMDX";
|
||||
case OpAllocateNodePayloadsAMDX: return "OpAllocateNodePayloadsAMDX";
|
||||
case OpEnqueueNodePayloadsAMDX: return "OpEnqueueNodePayloadsAMDX";
|
||||
case OpTypeNodePayloadArrayAMDX: return "OpTypeNodePayloadArrayAMDX";
|
||||
case OpFinishWritingNodePayloadAMDX: return "OpFinishWritingNodePayloadAMDX";
|
||||
case OpInitializeNodePayloadsAMDX: return "OpInitializeNodePayloadsAMDX";
|
||||
case OpNodePayloadArrayLengthAMDX: return "OpNodePayloadArrayLengthAMDX";
|
||||
case OpIsNodePayloadValidAMDX: return "OpIsNodePayloadValidAMDX";
|
||||
case OpConstantStringAMDX: return "OpConstantStringAMDX";
|
||||
case OpSpecConstantStringAMDX: return "OpSpecConstantStringAMDX";
|
||||
case OpGroupNonUniformQuadAllKHR: return "OpGroupNonUniformQuadAllKHR";
|
||||
case OpGroupNonUniformQuadAnyKHR: return "OpGroupNonUniformQuadAnyKHR";
|
||||
case OpHitObjectRecordHitMotionNV: return "OpHitObjectRecordHitMotionNV";
|
||||
|
@ -4433,12 +4745,20 @@ inline const char* OpToString(Op value) {
|
|||
case OpReorderThreadWithHintNV: return "OpReorderThreadWithHintNV";
|
||||
case OpTypeHitObjectNV: return "OpTypeHitObjectNV";
|
||||
case OpImageSampleFootprintNV: return "OpImageSampleFootprintNV";
|
||||
case OpTypeCooperativeVectorNV: return "OpTypeCooperativeVectorNV";
|
||||
case OpCooperativeVectorMatrixMulNV: return "OpCooperativeVectorMatrixMulNV";
|
||||
case OpCooperativeVectorOuterProductAccumulateNV: return "OpCooperativeVectorOuterProductAccumulateNV";
|
||||
case OpCooperativeVectorReduceSumAccumulateNV: return "OpCooperativeVectorReduceSumAccumulateNV";
|
||||
case OpCooperativeVectorMatrixMulAddNV: return "OpCooperativeVectorMatrixMulAddNV";
|
||||
case OpCooperativeMatrixConvertNV: return "OpCooperativeMatrixConvertNV";
|
||||
case OpEmitMeshTasksEXT: return "OpEmitMeshTasksEXT";
|
||||
case OpSetMeshOutputsEXT: return "OpSetMeshOutputsEXT";
|
||||
case OpGroupNonUniformPartitionNV: return "OpGroupNonUniformPartitionNV";
|
||||
case OpWritePackedPrimitiveIndices4x8NV: return "OpWritePackedPrimitiveIndices4x8NV";
|
||||
case OpFetchMicroTriangleVertexPositionNV: return "OpFetchMicroTriangleVertexPositionNV";
|
||||
case OpFetchMicroTriangleVertexBarycentricNV: return "OpFetchMicroTriangleVertexBarycentricNV";
|
||||
case OpCooperativeVectorLoadNV: return "OpCooperativeVectorLoadNV";
|
||||
case OpCooperativeVectorStoreNV: return "OpCooperativeVectorStoreNV";
|
||||
case OpReportIntersectionKHR: return "OpReportIntersectionKHR";
|
||||
case OpIgnoreIntersectionNV: return "OpIgnoreIntersectionNV";
|
||||
case OpTerminateRayNV: return "OpTerminateRayNV";
|
||||
|
@ -4448,6 +4768,8 @@ inline const char* OpToString(Op value) {
|
|||
case OpRayQueryGetIntersectionTriangleVertexPositionsKHR: return "OpRayQueryGetIntersectionTriangleVertexPositionsKHR";
|
||||
case OpTypeAccelerationStructureKHR: return "OpTypeAccelerationStructureKHR";
|
||||
case OpExecuteCallableNV: return "OpExecuteCallableNV";
|
||||
case OpRayQueryGetClusterIdNV: return "OpRayQueryGetClusterIdNV";
|
||||
case OpHitObjectGetClusterIdNV: return "OpHitObjectGetClusterIdNV";
|
||||
case OpTypeCooperativeMatrixNV: return "OpTypeCooperativeMatrixNV";
|
||||
case OpCooperativeMatrixLoadNV: return "OpCooperativeMatrixLoadNV";
|
||||
case OpCooperativeMatrixStoreNV: return "OpCooperativeMatrixStoreNV";
|
||||
|
@ -4455,8 +4777,25 @@ inline const char* OpToString(Op value) {
|
|||
case OpCooperativeMatrixLengthNV: return "OpCooperativeMatrixLengthNV";
|
||||
case OpBeginInvocationInterlockEXT: return "OpBeginInvocationInterlockEXT";
|
||||
case OpEndInvocationInterlockEXT: return "OpEndInvocationInterlockEXT";
|
||||
case OpCooperativeMatrixReduceNV: return "OpCooperativeMatrixReduceNV";
|
||||
case OpCooperativeMatrixLoadTensorNV: return "OpCooperativeMatrixLoadTensorNV";
|
||||
case OpCooperativeMatrixStoreTensorNV: return "OpCooperativeMatrixStoreTensorNV";
|
||||
case OpCooperativeMatrixPerElementOpNV: return "OpCooperativeMatrixPerElementOpNV";
|
||||
case OpTypeTensorLayoutNV: return "OpTypeTensorLayoutNV";
|
||||
case OpTypeTensorViewNV: return "OpTypeTensorViewNV";
|
||||
case OpCreateTensorLayoutNV: return "OpCreateTensorLayoutNV";
|
||||
case OpTensorLayoutSetDimensionNV: return "OpTensorLayoutSetDimensionNV";
|
||||
case OpTensorLayoutSetStrideNV: return "OpTensorLayoutSetStrideNV";
|
||||
case OpTensorLayoutSliceNV: return "OpTensorLayoutSliceNV";
|
||||
case OpTensorLayoutSetClampValueNV: return "OpTensorLayoutSetClampValueNV";
|
||||
case OpCreateTensorViewNV: return "OpCreateTensorViewNV";
|
||||
case OpTensorViewSetDimensionNV: return "OpTensorViewSetDimensionNV";
|
||||
case OpTensorViewSetStrideNV: return "OpTensorViewSetStrideNV";
|
||||
case OpDemoteToHelperInvocation: return "OpDemoteToHelperInvocation";
|
||||
case OpIsHelperInvocationEXT: return "OpIsHelperInvocationEXT";
|
||||
case OpTensorViewSetClipNV: return "OpTensorViewSetClipNV";
|
||||
case OpTensorLayoutSetBlockSizeNV: return "OpTensorLayoutSetBlockSizeNV";
|
||||
case OpCooperativeMatrixTransposeNV: return "OpCooperativeMatrixTransposeNV";
|
||||
case OpConvertUToImageNV: return "OpConvertUToImageNV";
|
||||
case OpConvertUToSamplerNV: return "OpConvertUToSamplerNV";
|
||||
case OpConvertImageToUNV: return "OpConvertImageToUNV";
|
||||
|
@ -4465,6 +4804,19 @@ inline const char* OpToString(Op value) {
|
|||
case OpConvertSampledImageToUNV: return "OpConvertSampledImageToUNV";
|
||||
case OpSamplerImageAddressingModeNV: return "OpSamplerImageAddressingModeNV";
|
||||
case OpRawAccessChainNV: return "OpRawAccessChainNV";
|
||||
case OpRayQueryGetIntersectionSpherePositionNV: return "OpRayQueryGetIntersectionSpherePositionNV";
|
||||
case OpRayQueryGetIntersectionSphereRadiusNV: return "OpRayQueryGetIntersectionSphereRadiusNV";
|
||||
case OpRayQueryGetIntersectionLSSPositionsNV: return "OpRayQueryGetIntersectionLSSPositionsNV";
|
||||
case OpRayQueryGetIntersectionLSSRadiiNV: return "OpRayQueryGetIntersectionLSSRadiiNV";
|
||||
case OpRayQueryGetIntersectionLSSHitValueNV: return "OpRayQueryGetIntersectionLSSHitValueNV";
|
||||
case OpHitObjectGetSpherePositionNV: return "OpHitObjectGetSpherePositionNV";
|
||||
case OpHitObjectGetSphereRadiusNV: return "OpHitObjectGetSphereRadiusNV";
|
||||
case OpHitObjectGetLSSPositionsNV: return "OpHitObjectGetLSSPositionsNV";
|
||||
case OpHitObjectGetLSSRadiiNV: return "OpHitObjectGetLSSRadiiNV";
|
||||
case OpHitObjectIsSphereHitNV: return "OpHitObjectIsSphereHitNV";
|
||||
case OpHitObjectIsLSSHitNV: return "OpHitObjectIsLSSHitNV";
|
||||
case OpRayQueryIsSphereHitNV: return "OpRayQueryIsSphereHitNV";
|
||||
case OpRayQueryIsLSSHitNV: return "OpRayQueryIsLSSHitNV";
|
||||
case OpSubgroupShuffleINTEL: return "OpSubgroupShuffleINTEL";
|
||||
case OpSubgroupShuffleDownINTEL: return "OpSubgroupShuffleDownINTEL";
|
||||
case OpSubgroupShuffleUpINTEL: return "OpSubgroupShuffleUpINTEL";
|
||||
|
@ -4709,7 +5061,14 @@ inline const char* OpToString(Op value) {
|
|||
case OpConvertBF16ToFINTEL: return "OpConvertBF16ToFINTEL";
|
||||
case OpControlBarrierArriveINTEL: return "OpControlBarrierArriveINTEL";
|
||||
case OpControlBarrierWaitINTEL: return "OpControlBarrierWaitINTEL";
|
||||
case OpArithmeticFenceEXT: return "OpArithmeticFenceEXT";
|
||||
case OpSubgroupBlockPrefetchINTEL: return "OpSubgroupBlockPrefetchINTEL";
|
||||
case OpSubgroup2DBlockLoadINTEL: return "OpSubgroup2DBlockLoadINTEL";
|
||||
case OpSubgroup2DBlockLoadTransformINTEL: return "OpSubgroup2DBlockLoadTransformINTEL";
|
||||
case OpSubgroup2DBlockLoadTransposeINTEL: return "OpSubgroup2DBlockLoadTransposeINTEL";
|
||||
case OpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
|
||||
case OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
|
||||
case OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
|
||||
case OpGroupIMulKHR: return "OpGroupIMulKHR";
|
||||
case OpGroupFMulKHR: return "OpGroupFMulKHR";
|
||||
case OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
|
||||
|
@ -4772,6 +5131,18 @@ inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a,
|
|||
inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
|
||||
inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
|
||||
inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
|
||||
inline CooperativeMatrixReduceMask operator|(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) | unsigned(b)); }
|
||||
inline CooperativeMatrixReduceMask operator&(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) & unsigned(b)); }
|
||||
inline CooperativeMatrixReduceMask operator^(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) ^ unsigned(b)); }
|
||||
inline CooperativeMatrixReduceMask operator~(CooperativeMatrixReduceMask a) { return CooperativeMatrixReduceMask(~unsigned(a)); }
|
||||
inline TensorAddressingOperandsMask operator|(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) | unsigned(b)); }
|
||||
inline TensorAddressingOperandsMask operator&(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) & unsigned(b)); }
|
||||
inline TensorAddressingOperandsMask operator^(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) ^ unsigned(b)); }
|
||||
inline TensorAddressingOperandsMask operator~(TensorAddressingOperandsMask a) { return TensorAddressingOperandsMask(~unsigned(a)); }
|
||||
inline MatrixMultiplyAccumulateOperandsMask operator|(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) | unsigned(b)); }
|
||||
inline MatrixMultiplyAccumulateOperandsMask operator&(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) & unsigned(b)); }
|
||||
inline MatrixMultiplyAccumulateOperandsMask operator^(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) ^ unsigned(b)); }
|
||||
inline MatrixMultiplyAccumulateOperandsMask operator~(MatrixMultiplyAccumulateOperandsMask a) { return MatrixMultiplyAccumulateOperandsMask(~unsigned(a)); }
|
||||
inline RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
|
||||
inline RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
|
||||
inline RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue