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updated vulkan to make use of cm2

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Concedo 2025-04-18 22:10:57 +08:00
parent 40adb8af35
commit 29b57d2175
99 changed files with 96968 additions and 35296 deletions
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2
include/vulkan/spirv-headers/NonSemanticVkspReflection.h
View file

@ -33,7 +33,7 @@ extern "C" {
#endif
enum {
NonSemanticVkspReflectionRevision = 3,
NonSemanticVkspReflectionRevision = 4,
NonSemanticVkspReflectionRevision_BitWidthPadding = 0x7fffffff
};

170
include/vulkan/spirv-headers/extinst.nonsemantic.vkspreflection.grammar.json
View file

@ -1,26 +1,26 @@
{
"revision" : 3,
"revision" : 4,
"instructions" : [
{
"opname" : "Configuration",
"opcode" : 1,
"operands" : [
{"kind" : "LiteralString", "name" : "enabledExtensionNames" },
{"kind" : "LiteralInteger", "name" : "specializationInfoDataSize" },
{"kind" : "LiteralString", "name" : "specializationInfoData" },
{"kind" : "LiteralString", "name" : "shaderName" },
{"kind" : "LiteralString", "name" : "EntryPoint" },
{"kind" : "LiteralInteger", "name" : "groupCountX" },
{"kind" : "LiteralInteger", "name" : "groupCountY" },
{"kind" : "LiteralInteger", "name" : "groupCountZ" },
{"kind" : "LiteralInteger", "name" : "dispatchId" }
{"kind" : "IdRef", "name" : "enabledExtensionNames" },
{"kind" : "IdRef", "name" : "specializationInfoDataSize" },
{"kind" : "IdRef", "name" : "specializationInfoData" },
{"kind" : "IdRef", "name" : "shaderName" },
{"kind" : "IdRef", "name" : "EntryPoint" },
{"kind" : "IdRef", "name" : "groupCountX" },
{"kind" : "IdRef", "name" : "groupCountY" },
{"kind" : "IdRef", "name" : "groupCountZ" },
{"kind" : "IdRef", "name" : "dispatchId" }
]
},
{
"opname" : "StartCounter",
"opcode" : 2,
"operands" : [
{"kind" : "LiteralString", "name" : "name" }
{"kind" : "IdRef", "name" : "name" }
]
},
{
@ -34,104 +34,104 @@
"opname" : "PushConstants",
"opcode" : 4,
"operands" : [
{ "kind" : "LiteralInteger", "name" : "offset" },
{ "kind" : "LiteralInteger", "name" : "size" },
{ "kind" : "LiteralString", "name" : "pValues" },
{ "kind" : "LiteralInteger", "name" : "stageFlags" }
{ "kind" : "IdRef", "name" : "offset" },
{ "kind" : "IdRef", "name" : "size" },
{ "kind" : "IdRef", "name" : "pValues" },
{ "kind" : "IdRef", "name" : "stageFlags" }
]
},
{
"opname" : "SpecializationMapEntry",
"opcode" : 5,
"operands" : [
{"kind" : "LiteralInteger", "name" : "constantID" },
{"kind" : "LiteralInteger", "name" : "offset" },
{"kind" : "LiteralInteger", "name" : "size" }
{"kind" : "IdRef", "name" : "constantID" },
{"kind" : "IdRef", "name" : "offset" },
{"kind" : "IdRef", "name" : "size" }
]
},
{
"opname" : "DescriptorSetBuffer",
"opcode" : 6,
"operands" : [
{ "kind" : "LiteralInteger", "name" : "ds" },
{ "kind" : "LiteralInteger", "name" : "binding" },
{ "kind" : "LiteralInteger", "name" : "type" },
{ "kind" : "LiteralInteger", "name" : "flags" },
{ "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount" },
{ "kind" : "LiteralInteger", "name" : "sharingMode" },
{ "kind" : "LiteralInteger", "name" : "size" },
{ "kind" : "LiteralInteger", "name" : "usage" },
{ "kind" : "LiteralInteger", "name" : "range" },
{ "kind" : "LiteralInteger", "name" : "offset" },
{ "kind" : "LiteralInteger", "name" : "memorySize" },
{ "kind" : "LiteralInteger", "name" : "memoryType" },
{ "kind" : "LiteralInteger", "name" : "bindOffset" },
{ "kind" : "LiteralInteger", "name" : "viewFlags" },
{ "kind" : "LiteralInteger", "name" : "viewFormat" }
{ "kind" : "IdRef", "name" : "ds" },
{ "kind" : "IdRef", "name" : "binding" },
{ "kind" : "IdRef", "name" : "type" },
{ "kind" : "IdRef", "name" : "flags" },
{ "kind" : "IdRef", "name" : "queueFamilyIndexCount" },
{ "kind" : "IdRef", "name" : "sharingMode" },
{ "kind" : "IdRef", "name" : "size" },
{ "kind" : "IdRef", "name" : "usage" },
{ "kind" : "IdRef", "name" : "range" },
{ "kind" : "IdRef", "name" : "offset" },
{ "kind" : "IdRef", "name" : "memorySize" },
{ "kind" : "IdRef", "name" : "memoryType" },
{ "kind" : "IdRef", "name" : "bindOffset" },
{ "kind" : "IdRef", "name" : "viewFlags" },
{ "kind" : "IdRef", "name" : "viewFormat" }
]
},
{
"opname" : "DescriptorSetImage",
"opcode" : 7,
"operands" : [
{ "kind" : "LiteralInteger", "name" : "ds" },
{ "kind" : "LiteralInteger", "name" : "binding" },
{ "kind" : "LiteralInteger", "name" : "type" },
{ "kind" : "LiteralInteger", "name" : "imageLayout"},
{ "kind" : "LiteralInteger", "name" : "imageFlags"},
{ "kind" : "LiteralInteger", "name" : "imageType"},
{ "kind" : "LiteralInteger", "name" : "imageformat"},
{ "kind" : "LiteralInteger", "name" : "width"},
{ "kind" : "LiteralInteger", "name" : "height"},
{ "kind" : "LiteralInteger", "name" : "depth"},
{ "kind" : "LiteralInteger", "name" : "mipLevels"},
{ "kind" : "LiteralInteger", "name" : "arrayLayers"},
{ "kind" : "LiteralInteger", "name" : "samples"},
{ "kind" : "LiteralInteger", "name" : "tiling"},
{ "kind" : "LiteralInteger", "name" : "usage"},
{ "kind" : "LiteralInteger", "name" : "sharingMode"},
{ "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount"},
{ "kind" : "LiteralInteger", "name" : "initialLayout"},
{ "kind" : "LiteralInteger", "name" : "aspectMask"},
{ "kind" : "LiteralInteger", "name" : "baseMipLevel"},
{ "kind" : "LiteralInteger", "name" : "levelCount"},
{ "kind" : "LiteralInteger", "name" : "baseArrayLayer"},
{ "kind" : "LiteralInteger", "name" : "layerCount"},
{ "kind" : "LiteralInteger", "name" : "viewFlags"},
{ "kind" : "LiteralInteger", "name" : "viewType"},
{ "kind" : "LiteralInteger", "name" : "viewFormat"},
{ "kind" : "LiteralInteger", "name" : "component_a"},
{ "kind" : "LiteralInteger", "name" : "component_b"},
{ "kind" : "LiteralInteger", "name" : "component_g"},
{ "kind" : "LiteralInteger", "name" : "component_r"},
{ "kind" : "LiteralInteger", "name" : "memorySize" },
{ "kind" : "LiteralInteger", "name" : "memoryType" },
{ "kind" : "LiteralInteger", "name" : "bindOffset"}
{ "kind" : "IdRef", "name" : "ds" },
{ "kind" : "IdRef", "name" : "binding" },
{ "kind" : "IdRef", "name" : "type" },
{ "kind" : "IdRef", "name" : "imageLayout"},
{ "kind" : "IdRef", "name" : "imageFlags"},
{ "kind" : "IdRef", "name" : "imageType"},
{ "kind" : "IdRef", "name" : "imageformat"},
{ "kind" : "IdRef", "name" : "width"},
{ "kind" : "IdRef", "name" : "height"},
{ "kind" : "IdRef", "name" : "depth"},
{ "kind" : "IdRef", "name" : "mipLevels"},
{ "kind" : "IdRef", "name" : "arrayLayers"},
{ "kind" : "IdRef", "name" : "samples"},
{ "kind" : "IdRef", "name" : "tiling"},
{ "kind" : "IdRef", "name" : "usage"},
{ "kind" : "IdRef", "name" : "sharingMode"},
{ "kind" : "IdRef", "name" : "queueFamilyIndexCount"},
{ "kind" : "IdRef", "name" : "initialLayout"},
{ "kind" : "IdRef", "name" : "aspectMask"},
{ "kind" : "IdRef", "name" : "baseMipLevel"},
{ "kind" : "IdRef", "name" : "levelCount"},
{ "kind" : "IdRef", "name" : "baseArrayLayer"},
{ "kind" : "IdRef", "name" : "layerCount"},
{ "kind" : "IdRef", "name" : "viewFlags"},
{ "kind" : "IdRef", "name" : "viewType"},
{ "kind" : "IdRef", "name" : "viewFormat"},
{ "kind" : "IdRef", "name" : "component_a"},
{ "kind" : "IdRef", "name" : "component_b"},
{ "kind" : "IdRef", "name" : "component_g"},
{ "kind" : "IdRef", "name" : "component_r"},
{ "kind" : "IdRef", "name" : "memorySize" },
{ "kind" : "IdRef", "name" : "memoryType" },
{ "kind" : "IdRef", "name" : "bindOffset"}
]
},
{
"opname" : "DescriptorSetSampler",
"opcode" : 8,
"operands" : [
{ "kind" : "LiteralInteger", "name" : "ds" },
{ "kind" : "LiteralInteger", "name" : "binding" },
{ "kind" : "LiteralInteger", "name" : "type" },
{ "kind" : "LiteralInteger", "name" : "flags"},
{ "kind" : "LiteralInteger", "name" : "magFilter"},
{ "kind" : "LiteralInteger", "name" : "minFilter"},
{ "kind" : "LiteralInteger", "name" : "mipmapMode"},
{ "kind" : "LiteralInteger", "name" : "addressModeU"},
{ "kind" : "LiteralInteger", "name" : "addressModeV"},
{ "kind" : "LiteralInteger", "name" : "addressModeW"},
{ "kind" : "LiteralFloat", "name" : "mipLodBias"},
{ "kind" : "LiteralInteger", "name" : "anisotropyEnable"},
{ "kind" : "LiteralFloat", "name" : "maxAnisotropy"},
{ "kind" : "LiteralInteger", "name" : "compareEnable"},
{ "kind" : "LiteralInteger", "name" : "compareOp"},
{ "kind" : "LiteralFloat", "name" : "minLod"},
{ "kind" : "LiteralFloat", "name" : "maxLod"},
{ "kind" : "LiteralInteger", "name" : "borderColor"},
{ "kind" : "LiteralInteger", "name" : "unnormalizedCoordinates"}
{ "kind" : "IdRef", "name" : "ds" },
{ "kind" : "IdRef", "name" : "binding" },
{ "kind" : "IdRef", "name" : "type" },
{ "kind" : "IdRef", "name" : "flags"},
{ "kind" : "IdRef", "name" : "magFilter"},
{ "kind" : "IdRef", "name" : "minFilter"},
{ "kind" : "IdRef", "name" : "mipmapMode"},
{ "kind" : "IdRef", "name" : "addressModeU"},
{ "kind" : "IdRef", "name" : "addressModeV"},
{ "kind" : "IdRef", "name" : "addressModeW"},
{ "kind" : "IdRef", "name" : "mipLodBias"},
{ "kind" : "IdRef", "name" : "anisotropyEnable"},
{ "kind" : "IdRef", "name" : "maxAnisotropy"},
{ "kind" : "IdRef", "name" : "compareEnable"},
{ "kind" : "IdRef", "name" : "compareOp"},
{ "kind" : "IdRef", "name" : "minLod"},
{ "kind" : "IdRef", "name" : "maxLod"},
{ "kind" : "IdRef", "name" : "borderColor"},
{ "kind" : "IdRef", "name" : "unnormalizedCoordinates"}
]
}
]

10
include/vulkan/spirv-headers/spir-v.xml
View file

@ -95,7 +95,9 @@
<id value="42" vendor="Rendong Liang" tool="spq" comment="Contact Rendong Liang, admin@penguinliong.moe, https://github.com/PENGUINLIONG/spq-rs"/>
<id value="43" vendor="LLVM" tool="LLVM SPIR-V Backend" comment="Contact Michal Paszkowski, michal.paszkowski@intel.com, https://github.com/llvm/llvm-project/tree/main/llvm/lib/Target/SPIRV"/>
<id value="44" vendor="Robert Konrad" tool="Kongruent" comment="Contact Robert Konrad, https://github.com/Kode/Kongruent"/>
<unused start="45" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
<id value="45" vendor="Kitsunebi Games" tool="Nuvk SPIR-V Emitter and DLSL compiler" comment="Contact Luna Nielsen, luna@foxgirls.gay, https://github.com/Inochi2D/nuvk"/>
<id value="46" vendor="Nintendo" comment="Contact Steve Urquhart, steve.urquhart@ntd.nintendo.com"/>
<unused start="47" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
</ids>
<!-- SECTION: SPIR-V Opcodes and Enumerants -->
@ -152,13 +154,14 @@
<ids type="opcode" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
<ids type="opcode" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
<ids type="opcode" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
<ids type="opcode" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
<!-- Opcode enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="opcode" start="6720" end="65535" comment="Opcode range reservable for future use by vendors"/>
<ids type="opcode" start="6784" end="65535" comment="Opcode range reservable for future use by vendors"/>
<!-- End reservations of opcodes -->
@ -185,13 +188,14 @@
<ids type="enumerant" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
<ids type="enumerant" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
<ids type="enumerant" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
<ids type="enumerant" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
<!-- Enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="enumerant" start="6720" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<ids type="enumerant" start="6784" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<!-- End reservations of enumerants -->

203
include/vulkan/spirv-headers/spirv.bf
View file

@ -12,7 +12,7 @@
//
// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
//
// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -71,6 +71,7 @@ namespace Spv
WGSL = 10,
Slang = 11,
Zig = 12,
Rust = 13,
Max = 0x7fffffff,
}
@ -175,6 +176,7 @@ namespace Spv
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
CoalescingAMDX = 5069,
IsApiEntryAMDX = 5070,
MaxNodeRecursionAMDX = 5071,
StaticNumWorkgroupsAMDX = 5072,
ShaderIndexAMDX = 5073,
@ -187,6 +189,7 @@ namespace Spv
StencilRefLessBackAMD = 5084,
QuadDerivativesKHR = 5088,
RequireFullQuadsKHR = 5089,
SharesInputWithAMDX = 5102,
OutputLinesEXT = 5269,
OutputLinesNV = 5269,
OutputPrimitivesEXT = 5270,
@ -241,7 +244,6 @@ namespace Spv
StorageBuffer = 12,
TileImageEXT = 4172,
NodePayloadAMDX = 5068,
NodeOutputPayloadAMDX = 5076,
CallableDataKHR = 5328,
CallableDataNV = 5328,
IncomingCallableDataKHR = 5329,
@ -569,6 +571,10 @@ namespace Spv
NodeMaxPayloadsAMDX = 5020,
TrackFinishWritingAMDX = 5078,
PayloadNodeNameAMDX = 5091,
PayloadNodeBaseIndexAMDX = 5098,
PayloadNodeSparseArrayAMDX = 5099,
PayloadNodeArraySizeAMDX = 5100,
PayloadDispatchIndirectAMDX = 5105,
OverrideCoverageNV = 5248,
PassthroughNV = 5250,
ViewportRelativeNV = 5252,
@ -733,7 +739,7 @@ namespace Spv
BaryCoordSmoothSampleAMD = 4997,
BaryCoordPullModelAMD = 4998,
FragStencilRefEXT = 5014,
CoalescedInputCountAMDX = 5021,
RemainingRecursionLevelsAMDX = 5021,
ShaderIndexAMDX = 5073,
ViewportMaskNV = 5253,
SecondaryPositionNV = 5257,
@ -793,12 +799,19 @@ namespace Spv
IncomingRayFlagsKHR = 5351,
IncomingRayFlagsNV = 5351,
RayGeometryIndexKHR = 5352,
HitIsSphereNV = 5359,
HitIsLSSNV = 5360,
HitSpherePositionNV = 5361,
WarpsPerSMNV = 5374,
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
HitLSSPositionsNV = 5396,
HitKindFrontFacingMicroTriangleNV = 5405,
HitKindBackFacingMicroTriangleNV = 5406,
HitSphereRadiusNV = 5420,
HitLSSRadiiNV = 5421,
ClusterIDNV = 5436,
CullMaskKHR = 6021,
Max = 0x7fffffff,
}
@ -871,6 +884,7 @@ namespace Spv
DontInline = 1,
Pure = 2,
Const = 3,
OptNoneEXT = 16,
OptNoneINTEL = 16,
Max = 0x7fffffff,
}
@ -882,6 +896,7 @@ namespace Spv
DontInline = 0x00000002,
Pure = 0x00000004,
Const = 0x00000008,
OptNoneEXT = 0x00010000,
OptNoneINTEL = 0x00010000,
}
@ -1194,9 +1209,20 @@ namespace Spv
ShaderInvocationReorderNV = 5383,
BindlessTextureNV = 5390,
RayQueryPositionFetchKHR = 5391,
CooperativeVectorNV = 5394,
AtomicFloat16VectorNV = 5404,
RayTracingDisplacementMicromapNV = 5409,
RawAccessChainsNV = 5414,
RayTracingSpheresGeometryNV = 5418,
RayTracingLinearSweptSpheresGeometryNV = 5419,
CooperativeMatrixReductionsNV = 5430,
CooperativeMatrixConversionsNV = 5431,
CooperativeMatrixPerElementOperationsNV = 5432,
CooperativeMatrixTensorAddressingNV = 5433,
CooperativeMatrixBlockLoadsNV = 5434,
CooperativeVectorTrainingNV = 5435,
RayTracingClusterAccelerationStructureNV = 5437,
TensorAddressingNV = 5439,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1256,11 +1282,13 @@ namespace Spv
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
OptNoneEXT = 6094,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
ArithmeticFenceEXT = 6144,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
@ -1269,6 +1297,10 @@ namespace Spv
GlobalVariableHostAccessINTEL = 6187,
GlobalVariableFPGADecorationsINTEL = 6189,
SubgroupBufferPrefetchINTEL = 6220,
Subgroup2DBlockIOINTEL = 6228,
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
@ -1286,6 +1318,7 @@ namespace Spv
CullFrontFacingTrianglesKHR = 5,
CullOpaqueKHR = 6,
CullNoOpaqueKHR = 7,
SkipBuiltinPrimitivesNV = 8,
SkipTrianglesKHR = 8,
SkipAABBsKHR = 9,
ForceOpacityMicromap2StateEXT = 10,
@ -1303,6 +1336,7 @@ namespace Spv
CullFrontFacingTrianglesKHR = 0x00000020,
CullOpaqueKHR = 0x00000040,
CullNoOpaqueKHR = 0x00000080,
SkipBuiltinPrimitivesNV = 0x00000100,
SkipTrianglesKHR = 0x00000100,
SkipAABBsKHR = 0x00000200,
ForceOpacityMicromap2StateEXT = 0x00000400,
@ -1428,6 +1462,46 @@ namespace Spv
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum CooperativeMatrixReduceShift
{
Row = 0,
Column = 1,
CooperativeMatrixReduce2x2 = 2,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum CooperativeMatrixReduceMask
{
MaskNone = 0,
Row = 0x00000001,
Column = 0x00000002,
CooperativeMatrixReduce2x2 = 0x00000004,
}
[AllowDuplicates, CRepr] public enum TensorClampMode
{
Undefined = 0,
Constant = 1,
ClampToEdge = 2,
Repeat = 3,
RepeatMirrored = 4,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum TensorAddressingOperandsShift
{
TensorView = 0,
DecodeFunc = 1,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum TensorAddressingOperandsMask
{
MaskNone = 0,
TensorView = 0x00000001,
DecodeFunc = 0x00000002,
}
[AllowDuplicates, CRepr] public enum InitializationModeQualifier
{
InitOnDeviceReprogramINTEL = 0,
@ -1469,6 +1543,44 @@ namespace Spv
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum MatrixMultiplyAccumulateOperandsShift
{
MatrixASignedComponentsINTEL = 0,
MatrixBSignedComponentsINTEL = 1,
MatrixCBFloat16INTEL = 2,
MatrixResultBFloat16INTEL = 3,
MatrixAPackedInt8INTEL = 4,
MatrixBPackedInt8INTEL = 5,
MatrixAPackedInt4INTEL = 6,
MatrixBPackedInt4INTEL = 7,
MatrixATF32INTEL = 8,
MatrixBTF32INTEL = 9,
MatrixAPackedFloat16INTEL = 10,
MatrixBPackedFloat16INTEL = 11,
MatrixAPackedBFloat16INTEL = 12,
MatrixBPackedBFloat16INTEL = 13,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum MatrixMultiplyAccumulateOperandsMask
{
MaskNone = 0,
MatrixASignedComponentsINTEL = 0x00000001,
MatrixBSignedComponentsINTEL = 0x00000002,
MatrixCBFloat16INTEL = 0x00000004,
MatrixResultBFloat16INTEL = 0x00000008,
MatrixAPackedInt8INTEL = 0x00000010,
MatrixBPackedInt8INTEL = 0x00000020,
MatrixAPackedInt4INTEL = 0x00000040,
MatrixBPackedInt4INTEL = 0x00000080,
MatrixATF32INTEL = 0x00000100,
MatrixBTF32INTEL = 0x00000200,
MatrixAPackedFloat16INTEL = 0x00000400,
MatrixBPackedFloat16INTEL = 0x00000800,
MatrixAPackedBFloat16INTEL = 0x00001000,
MatrixBPackedBFloat16INTEL = 0x00002000,
}
[AllowDuplicates, CRepr] public enum RawAccessChainOperandsShift
{
RobustnessPerComponentNV = 0,
@ -1488,6 +1600,35 @@ namespace Spv
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum CooperativeVectorMatrixLayout
{
RowMajorNV = 0,
ColumnMajorNV = 1,
InferencingOptimalNV = 2,
TrainingOptimalNV = 3,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum ComponentType
{
Float16NV = 0,
Float32NV = 1,
Float64NV = 2,
SignedInt8NV = 3,
SignedInt16NV = 4,
SignedInt32NV = 5,
SignedInt64NV = 6,
UnsignedInt8NV = 7,
UnsignedInt16NV = 8,
UnsignedInt32NV = 9,
UnsignedInt64NV = 10,
SignedInt8PackedNV = 1000491000,
UnsignedInt8PackedNV = 1000491001,
FloatE4M3NV = 1000491002,
FloatE5M2NV = 1000491003,
Max = 0x7fffffff,
}
[AllowDuplicates, CRepr] public enum Op
{
OpNop = 0,
@ -1905,9 +2046,14 @@ namespace Spv
OpFragmentMaskFetchAMD = 5011,
OpFragmentFetchAMD = 5012,
OpReadClockKHR = 5056,
OpFinalizeNodePayloadsAMDX = 5075,
OpAllocateNodePayloadsAMDX = 5074,
OpEnqueueNodePayloadsAMDX = 5075,
OpTypeNodePayloadArrayAMDX = 5076,
OpFinishWritingNodePayloadAMDX = 5078,
OpInitializeNodePayloadsAMDX = 5090,
OpNodePayloadArrayLengthAMDX = 5090,
OpIsNodePayloadValidAMDX = 5101,
OpConstantStringAMDX = 5103,
OpSpecConstantStringAMDX = 5104,
OpGroupNonUniformQuadAllKHR = 5110,
OpGroupNonUniformQuadAnyKHR = 5111,
OpHitObjectRecordHitMotionNV = 5249,
@ -1944,12 +2090,20 @@ namespace Spv
OpReorderThreadWithHintNV = 5280,
OpTypeHitObjectNV = 5281,
OpImageSampleFootprintNV = 5283,
OpTypeCooperativeVectorNV = 5288,
OpCooperativeVectorMatrixMulNV = 5289,
OpCooperativeVectorOuterProductAccumulateNV = 5290,
OpCooperativeVectorReduceSumAccumulateNV = 5291,
OpCooperativeVectorMatrixMulAddNV = 5292,
OpCooperativeMatrixConvertNV = 5293,
OpEmitMeshTasksEXT = 5294,
OpSetMeshOutputsEXT = 5295,
OpGroupNonUniformPartitionNV = 5296,
OpWritePackedPrimitiveIndices4x8NV = 5299,
OpFetchMicroTriangleVertexPositionNV = 5300,
OpFetchMicroTriangleVertexBarycentricNV = 5301,
OpCooperativeVectorLoadNV = 5302,
OpCooperativeVectorStoreNV = 5303,
OpReportIntersectionKHR = 5334,
OpReportIntersectionNV = 5334,
OpIgnoreIntersectionNV = 5335,
@ -1961,6 +2115,8 @@ namespace Spv
OpTypeAccelerationStructureKHR = 5341,
OpTypeAccelerationStructureNV = 5341,
OpExecuteCallableNV = 5344,
OpRayQueryGetClusterIdNV = 5345,
OpHitObjectGetClusterIdNV = 5346,
OpTypeCooperativeMatrixNV = 5358,
OpCooperativeMatrixLoadNV = 5359,
OpCooperativeMatrixStoreNV = 5360,
@ -1968,9 +2124,26 @@ namespace Spv
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpCooperativeMatrixReduceNV = 5366,
OpCooperativeMatrixLoadTensorNV = 5367,
OpCooperativeMatrixStoreTensorNV = 5368,
OpCooperativeMatrixPerElementOpNV = 5369,
OpTypeTensorLayoutNV = 5370,
OpTypeTensorViewNV = 5371,
OpCreateTensorLayoutNV = 5372,
OpTensorLayoutSetDimensionNV = 5373,
OpTensorLayoutSetStrideNV = 5374,
OpTensorLayoutSliceNV = 5375,
OpTensorLayoutSetClampValueNV = 5376,
OpCreateTensorViewNV = 5377,
OpTensorViewSetDimensionNV = 5378,
OpTensorViewSetStrideNV = 5379,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpTensorViewSetClipNV = 5382,
OpTensorLayoutSetBlockSizeNV = 5384,
OpCooperativeMatrixTransposeNV = 5390,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
@ -1979,6 +2152,19 @@ namespace Spv
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpRawAccessChainNV = 5398,
OpRayQueryGetIntersectionSpherePositionNV = 5427,
OpRayQueryGetIntersectionSphereRadiusNV = 5428,
OpRayQueryGetIntersectionLSSPositionsNV = 5429,
OpRayQueryGetIntersectionLSSRadiiNV = 5430,
OpRayQueryGetIntersectionLSSHitValueNV = 5431,
OpHitObjectGetSpherePositionNV = 5432,
OpHitObjectGetSphereRadiusNV = 5433,
OpHitObjectGetLSSPositionsNV = 5434,
OpHitObjectGetLSSRadiiNV = 5435,
OpHitObjectIsSphereHitNV = 5436,
OpHitObjectIsLSSHitNV = 5437,
OpRayQueryIsSphereHitNV = 5438,
OpRayQueryIsLSSHitNV = 5439,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -2225,7 +2411,14 @@ namespace Spv
OpConvertBF16ToFINTEL = 6117,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpArithmeticFenceEXT = 6145,
OpSubgroupBlockPrefetchINTEL = 6221,
OpSubgroup2DBlockLoadINTEL = 6231,
OpSubgroup2DBlockLoadTransformINTEL = 6232,
OpSubgroup2DBlockLoadTransposeINTEL = 6233,
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,

2180
include/vulkan/spirv-headers/spirv.core.grammar.json
View file

File diff suppressed because it is too large Load diff

203
include/vulkan/spirv-headers/spirv.cs
View file

@ -12,7 +12,7 @@
//
// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
//
// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -70,6 +70,7 @@ namespace Spv
WGSL = 10,
Slang = 11,
Zig = 12,
Rust = 13,
Max = 0x7fffffff,
}
@ -174,6 +175,7 @@ namespace Spv
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
CoalescingAMDX = 5069,
IsApiEntryAMDX = 5070,
MaxNodeRecursionAMDX = 5071,
StaticNumWorkgroupsAMDX = 5072,
ShaderIndexAMDX = 5073,
@ -186,6 +188,7 @@ namespace Spv
StencilRefLessBackAMD = 5084,
QuadDerivativesKHR = 5088,
RequireFullQuadsKHR = 5089,
SharesInputWithAMDX = 5102,
OutputLinesEXT = 5269,
OutputLinesNV = 5269,
OutputPrimitivesEXT = 5270,
@ -240,7 +243,6 @@ namespace Spv
StorageBuffer = 12,
TileImageEXT = 4172,
NodePayloadAMDX = 5068,
NodeOutputPayloadAMDX = 5076,
CallableDataKHR = 5328,
CallableDataNV = 5328,
IncomingCallableDataKHR = 5329,
@ -568,6 +570,10 @@ namespace Spv
NodeMaxPayloadsAMDX = 5020,
TrackFinishWritingAMDX = 5078,
PayloadNodeNameAMDX = 5091,
PayloadNodeBaseIndexAMDX = 5098,
PayloadNodeSparseArrayAMDX = 5099,
PayloadNodeArraySizeAMDX = 5100,
PayloadDispatchIndirectAMDX = 5105,
OverrideCoverageNV = 5248,
PassthroughNV = 5250,
ViewportRelativeNV = 5252,
@ -732,7 +738,7 @@ namespace Spv
BaryCoordSmoothSampleAMD = 4997,
BaryCoordPullModelAMD = 4998,
FragStencilRefEXT = 5014,
CoalescedInputCountAMDX = 5021,
RemainingRecursionLevelsAMDX = 5021,
ShaderIndexAMDX = 5073,
ViewportMaskNV = 5253,
SecondaryPositionNV = 5257,
@ -792,12 +798,19 @@ namespace Spv
IncomingRayFlagsKHR = 5351,
IncomingRayFlagsNV = 5351,
RayGeometryIndexKHR = 5352,
HitIsSphereNV = 5359,
HitIsLSSNV = 5360,
HitSpherePositionNV = 5361,
WarpsPerSMNV = 5374,
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
HitLSSPositionsNV = 5396,
HitKindFrontFacingMicroTriangleNV = 5405,
HitKindBackFacingMicroTriangleNV = 5406,
HitSphereRadiusNV = 5420,
HitLSSRadiiNV = 5421,
ClusterIDNV = 5436,
CullMaskKHR = 6021,
Max = 0x7fffffff,
}
@ -870,6 +883,7 @@ namespace Spv
DontInline = 1,
Pure = 2,
Const = 3,
OptNoneEXT = 16,
OptNoneINTEL = 16,
Max = 0x7fffffff,
}
@ -881,6 +895,7 @@ namespace Spv
DontInline = 0x00000002,
Pure = 0x00000004,
Const = 0x00000008,
OptNoneEXT = 0x00010000,
OptNoneINTEL = 0x00010000,
}
@ -1193,9 +1208,20 @@ namespace Spv
ShaderInvocationReorderNV = 5383,
BindlessTextureNV = 5390,
RayQueryPositionFetchKHR = 5391,
CooperativeVectorNV = 5394,
AtomicFloat16VectorNV = 5404,
RayTracingDisplacementMicromapNV = 5409,
RawAccessChainsNV = 5414,
RayTracingSpheresGeometryNV = 5418,
RayTracingLinearSweptSpheresGeometryNV = 5419,
CooperativeMatrixReductionsNV = 5430,
CooperativeMatrixConversionsNV = 5431,
CooperativeMatrixPerElementOperationsNV = 5432,
CooperativeMatrixTensorAddressingNV = 5433,
CooperativeMatrixBlockLoadsNV = 5434,
CooperativeVectorTrainingNV = 5435,
RayTracingClusterAccelerationStructureNV = 5437,
TensorAddressingNV = 5439,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1255,11 +1281,13 @@ namespace Spv
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
OptNoneEXT = 6094,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
ArithmeticFenceEXT = 6144,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
@ -1268,6 +1296,10 @@ namespace Spv
GlobalVariableHostAccessINTEL = 6187,
GlobalVariableFPGADecorationsINTEL = 6189,
SubgroupBufferPrefetchINTEL = 6220,
Subgroup2DBlockIOINTEL = 6228,
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
@ -1285,6 +1317,7 @@ namespace Spv
CullFrontFacingTrianglesKHR = 5,
CullOpaqueKHR = 6,
CullNoOpaqueKHR = 7,
SkipBuiltinPrimitivesNV = 8,
SkipTrianglesKHR = 8,
SkipAABBsKHR = 9,
ForceOpacityMicromap2StateEXT = 10,
@ -1302,6 +1335,7 @@ namespace Spv
CullFrontFacingTrianglesKHR = 0x00000020,
CullOpaqueKHR = 0x00000040,
CullNoOpaqueKHR = 0x00000080,
SkipBuiltinPrimitivesNV = 0x00000100,
SkipTrianglesKHR = 0x00000100,
SkipAABBsKHR = 0x00000200,
ForceOpacityMicromap2StateEXT = 0x00000400,
@ -1427,6 +1461,46 @@ namespace Spv
Max = 0x7fffffff,
}
public enum CooperativeMatrixReduceShift
{
Row = 0,
Column = 1,
CooperativeMatrixReduce2x2 = 2,
Max = 0x7fffffff,
}
public enum CooperativeMatrixReduceMask
{
MaskNone = 0,
Row = 0x00000001,
Column = 0x00000002,
CooperativeMatrixReduce2x2 = 0x00000004,
}
public enum TensorClampMode
{
Undefined = 0,
Constant = 1,
ClampToEdge = 2,
Repeat = 3,
RepeatMirrored = 4,
Max = 0x7fffffff,
}
public enum TensorAddressingOperandsShift
{
TensorView = 0,
DecodeFunc = 1,
Max = 0x7fffffff,
}
public enum TensorAddressingOperandsMask
{
MaskNone = 0,
TensorView = 0x00000001,
DecodeFunc = 0x00000002,
}
public enum InitializationModeQualifier
{
InitOnDeviceReprogramINTEL = 0,
@ -1468,6 +1542,44 @@ namespace Spv
Max = 0x7fffffff,
}
public enum MatrixMultiplyAccumulateOperandsShift
{
MatrixASignedComponentsINTEL = 0,
MatrixBSignedComponentsINTEL = 1,
MatrixCBFloat16INTEL = 2,
MatrixResultBFloat16INTEL = 3,
MatrixAPackedInt8INTEL = 4,
MatrixBPackedInt8INTEL = 5,
MatrixAPackedInt4INTEL = 6,
MatrixBPackedInt4INTEL = 7,
MatrixATF32INTEL = 8,
MatrixBTF32INTEL = 9,
MatrixAPackedFloat16INTEL = 10,
MatrixBPackedFloat16INTEL = 11,
MatrixAPackedBFloat16INTEL = 12,
MatrixBPackedBFloat16INTEL = 13,
Max = 0x7fffffff,
}
public enum MatrixMultiplyAccumulateOperandsMask
{
MaskNone = 0,
MatrixASignedComponentsINTEL = 0x00000001,
MatrixBSignedComponentsINTEL = 0x00000002,
MatrixCBFloat16INTEL = 0x00000004,
MatrixResultBFloat16INTEL = 0x00000008,
MatrixAPackedInt8INTEL = 0x00000010,
MatrixBPackedInt8INTEL = 0x00000020,
MatrixAPackedInt4INTEL = 0x00000040,
MatrixBPackedInt4INTEL = 0x00000080,
MatrixATF32INTEL = 0x00000100,
MatrixBTF32INTEL = 0x00000200,
MatrixAPackedFloat16INTEL = 0x00000400,
MatrixBPackedFloat16INTEL = 0x00000800,
MatrixAPackedBFloat16INTEL = 0x00001000,
MatrixBPackedBFloat16INTEL = 0x00002000,
}
public enum RawAccessChainOperandsShift
{
RobustnessPerComponentNV = 0,
@ -1487,6 +1599,35 @@ namespace Spv
Max = 0x7fffffff,
}
public enum CooperativeVectorMatrixLayout
{
RowMajorNV = 0,
ColumnMajorNV = 1,
InferencingOptimalNV = 2,
TrainingOptimalNV = 3,
Max = 0x7fffffff,
}
public enum ComponentType
{
Float16NV = 0,
Float32NV = 1,
Float64NV = 2,
SignedInt8NV = 3,
SignedInt16NV = 4,
SignedInt32NV = 5,
SignedInt64NV = 6,
UnsignedInt8NV = 7,
UnsignedInt16NV = 8,
UnsignedInt32NV = 9,
UnsignedInt64NV = 10,
SignedInt8PackedNV = 1000491000,
UnsignedInt8PackedNV = 1000491001,
FloatE4M3NV = 1000491002,
FloatE5M2NV = 1000491003,
Max = 0x7fffffff,
}
public enum Op
{
OpNop = 0,
@ -1904,9 +2045,14 @@ namespace Spv
OpFragmentMaskFetchAMD = 5011,
OpFragmentFetchAMD = 5012,
OpReadClockKHR = 5056,
OpFinalizeNodePayloadsAMDX = 5075,
OpAllocateNodePayloadsAMDX = 5074,
OpEnqueueNodePayloadsAMDX = 5075,
OpTypeNodePayloadArrayAMDX = 5076,
OpFinishWritingNodePayloadAMDX = 5078,
OpInitializeNodePayloadsAMDX = 5090,
OpNodePayloadArrayLengthAMDX = 5090,
OpIsNodePayloadValidAMDX = 5101,
OpConstantStringAMDX = 5103,
OpSpecConstantStringAMDX = 5104,
OpGroupNonUniformQuadAllKHR = 5110,
OpGroupNonUniformQuadAnyKHR = 5111,
OpHitObjectRecordHitMotionNV = 5249,
@ -1943,12 +2089,20 @@ namespace Spv
OpReorderThreadWithHintNV = 5280,
OpTypeHitObjectNV = 5281,
OpImageSampleFootprintNV = 5283,
OpTypeCooperativeVectorNV = 5288,
OpCooperativeVectorMatrixMulNV = 5289,
OpCooperativeVectorOuterProductAccumulateNV = 5290,
OpCooperativeVectorReduceSumAccumulateNV = 5291,
OpCooperativeVectorMatrixMulAddNV = 5292,
OpCooperativeMatrixConvertNV = 5293,
OpEmitMeshTasksEXT = 5294,
OpSetMeshOutputsEXT = 5295,
OpGroupNonUniformPartitionNV = 5296,
OpWritePackedPrimitiveIndices4x8NV = 5299,
OpFetchMicroTriangleVertexPositionNV = 5300,
OpFetchMicroTriangleVertexBarycentricNV = 5301,
OpCooperativeVectorLoadNV = 5302,
OpCooperativeVectorStoreNV = 5303,
OpReportIntersectionKHR = 5334,
OpReportIntersectionNV = 5334,
OpIgnoreIntersectionNV = 5335,
@ -1960,6 +2114,8 @@ namespace Spv
OpTypeAccelerationStructureKHR = 5341,
OpTypeAccelerationStructureNV = 5341,
OpExecuteCallableNV = 5344,
OpRayQueryGetClusterIdNV = 5345,
OpHitObjectGetClusterIdNV = 5346,
OpTypeCooperativeMatrixNV = 5358,
OpCooperativeMatrixLoadNV = 5359,
OpCooperativeMatrixStoreNV = 5360,
@ -1967,9 +2123,26 @@ namespace Spv
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpCooperativeMatrixReduceNV = 5366,
OpCooperativeMatrixLoadTensorNV = 5367,
OpCooperativeMatrixStoreTensorNV = 5368,
OpCooperativeMatrixPerElementOpNV = 5369,
OpTypeTensorLayoutNV = 5370,
OpTypeTensorViewNV = 5371,
OpCreateTensorLayoutNV = 5372,
OpTensorLayoutSetDimensionNV = 5373,
OpTensorLayoutSetStrideNV = 5374,
OpTensorLayoutSliceNV = 5375,
OpTensorLayoutSetClampValueNV = 5376,
OpCreateTensorViewNV = 5377,
OpTensorViewSetDimensionNV = 5378,
OpTensorViewSetStrideNV = 5379,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpTensorViewSetClipNV = 5382,
OpTensorLayoutSetBlockSizeNV = 5384,
OpCooperativeMatrixTransposeNV = 5390,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
@ -1978,6 +2151,19 @@ namespace Spv
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpRawAccessChainNV = 5398,
OpRayQueryGetIntersectionSpherePositionNV = 5427,
OpRayQueryGetIntersectionSphereRadiusNV = 5428,
OpRayQueryGetIntersectionLSSPositionsNV = 5429,
OpRayQueryGetIntersectionLSSRadiiNV = 5430,
OpRayQueryGetIntersectionLSSHitValueNV = 5431,
OpHitObjectGetSpherePositionNV = 5432,
OpHitObjectGetSphereRadiusNV = 5433,
OpHitObjectGetLSSPositionsNV = 5434,
OpHitObjectGetLSSRadiiNV = 5435,
OpHitObjectIsSphereHitNV = 5436,
OpHitObjectIsLSSHitNV = 5437,
OpRayQueryIsSphereHitNV = 5438,
OpRayQueryIsLSSHitNV = 5439,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -2224,7 +2410,14 @@ namespace Spv
OpConvertBF16ToFINTEL = 6117,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpArithmeticFenceEXT = 6145,
OpSubgroupBlockPrefetchINTEL = 6221,
OpSubgroup2DBlockLoadINTEL = 6231,
OpSubgroup2DBlockLoadTransformINTEL = 6232,
OpSubgroup2DBlockLoadTransposeINTEL = 6233,
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,

385
include/vulkan/spirv-headers/spirv.h
View file

@ -13,7 +13,7 @@
**
** MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
** STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
** HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
** HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
**
** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
** OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -78,6 +78,7 @@ typedef enum SpvSourceLanguage_ {
SpvSourceLanguageWGSL = 10,
SpvSourceLanguageSlang = 11,
SpvSourceLanguageZig = 12,
SpvSourceLanguageRust = 13,
SpvSourceLanguageMax = 0x7fffffff,
} SpvSourceLanguage;
@ -178,6 +179,7 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
SpvExecutionModeStencilRefReplacingEXT = 5027,
SpvExecutionModeCoalescingAMDX = 5069,
SpvExecutionModeIsApiEntryAMDX = 5070,
SpvExecutionModeMaxNodeRecursionAMDX = 5071,
SpvExecutionModeStaticNumWorkgroupsAMDX = 5072,
SpvExecutionModeShaderIndexAMDX = 5073,
@ -190,6 +192,7 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeStencilRefLessBackAMD = 5084,
SpvExecutionModeQuadDerivativesKHR = 5088,
SpvExecutionModeRequireFullQuadsKHR = 5089,
SpvExecutionModeSharesInputWithAMDX = 5102,
SpvExecutionModeOutputLinesEXT = 5269,
SpvExecutionModeOutputLinesNV = 5269,
SpvExecutionModeOutputPrimitivesEXT = 5270,
@ -243,7 +246,6 @@ typedef enum SpvStorageClass_ {
SpvStorageClassStorageBuffer = 12,
SpvStorageClassTileImageEXT = 4172,
SpvStorageClassNodePayloadAMDX = 5068,
SpvStorageClassNodeOutputPayloadAMDX = 5076,
SpvStorageClassCallableDataKHR = 5328,
SpvStorageClassCallableDataNV = 5328,
SpvStorageClassIncomingCallableDataKHR = 5329,
@ -556,6 +558,10 @@ typedef enum SpvDecoration_ {
SpvDecorationNodeMaxPayloadsAMDX = 5020,
SpvDecorationTrackFinishWritingAMDX = 5078,
SpvDecorationPayloadNodeNameAMDX = 5091,
SpvDecorationPayloadNodeBaseIndexAMDX = 5098,
SpvDecorationPayloadNodeSparseArrayAMDX = 5099,
SpvDecorationPayloadNodeArraySizeAMDX = 5100,
SpvDecorationPayloadDispatchIndirectAMDX = 5105,
SpvDecorationOverrideCoverageNV = 5248,
SpvDecorationPassthroughNV = 5250,
SpvDecorationViewportRelativeNV = 5252,
@ -719,7 +725,7 @@ typedef enum SpvBuiltIn_ {
SpvBuiltInBaryCoordSmoothSampleAMD = 4997,
SpvBuiltInBaryCoordPullModelAMD = 4998,
SpvBuiltInFragStencilRefEXT = 5014,
SpvBuiltInCoalescedInputCountAMDX = 5021,
SpvBuiltInRemainingRecursionLevelsAMDX = 5021,
SpvBuiltInShaderIndexAMDX = 5073,
SpvBuiltInViewportMaskNV = 5253,
SpvBuiltInSecondaryPositionNV = 5257,
@ -779,12 +785,19 @@ typedef enum SpvBuiltIn_ {
SpvBuiltInIncomingRayFlagsKHR = 5351,
SpvBuiltInIncomingRayFlagsNV = 5351,
SpvBuiltInRayGeometryIndexKHR = 5352,
SpvBuiltInHitIsSphereNV = 5359,
SpvBuiltInHitIsLSSNV = 5360,
SpvBuiltInHitSpherePositionNV = 5361,
SpvBuiltInWarpsPerSMNV = 5374,
SpvBuiltInSMCountNV = 5375,
SpvBuiltInWarpIDNV = 5376,
SpvBuiltInSMIDNV = 5377,
SpvBuiltInHitLSSPositionsNV = 5396,
SpvBuiltInHitKindFrontFacingMicroTriangleNV = 5405,
SpvBuiltInHitKindBackFacingMicroTriangleNV = 5406,
SpvBuiltInHitSphereRadiusNV = 5420,
SpvBuiltInHitLSSRadiiNV = 5421,
SpvBuiltInClusterIDNV = 5436,
SpvBuiltInCullMaskKHR = 6021,
SpvBuiltInMax = 0x7fffffff,
} SpvBuiltIn;
@ -852,6 +865,7 @@ typedef enum SpvFunctionControlShift_ {
SpvFunctionControlDontInlineShift = 1,
SpvFunctionControlPureShift = 2,
SpvFunctionControlConstShift = 3,
SpvFunctionControlOptNoneEXTShift = 16,
SpvFunctionControlOptNoneINTELShift = 16,
SpvFunctionControlMax = 0x7fffffff,
} SpvFunctionControlShift;
@ -862,6 +876,7 @@ typedef enum SpvFunctionControlMask_ {
SpvFunctionControlDontInlineMask = 0x00000002,
SpvFunctionControlPureMask = 0x00000004,
SpvFunctionControlConstMask = 0x00000008,
SpvFunctionControlOptNoneEXTMask = 0x00010000,
SpvFunctionControlOptNoneINTELMask = 0x00010000,
} SpvFunctionControlMask;
@ -1164,9 +1179,20 @@ typedef enum SpvCapability_ {
SpvCapabilityShaderInvocationReorderNV = 5383,
SpvCapabilityBindlessTextureNV = 5390,
SpvCapabilityRayQueryPositionFetchKHR = 5391,
SpvCapabilityCooperativeVectorNV = 5394,
SpvCapabilityAtomicFloat16VectorNV = 5404,
SpvCapabilityRayTracingDisplacementMicromapNV = 5409,
SpvCapabilityRawAccessChainsNV = 5414,
SpvCapabilityRayTracingSpheresGeometryNV = 5418,
SpvCapabilityRayTracingLinearSweptSpheresGeometryNV = 5419,
SpvCapabilityCooperativeMatrixReductionsNV = 5430,
SpvCapabilityCooperativeMatrixConversionsNV = 5431,
SpvCapabilityCooperativeMatrixPerElementOperationsNV = 5432,
SpvCapabilityCooperativeMatrixTensorAddressingNV = 5433,
SpvCapabilityCooperativeMatrixBlockLoadsNV = 5434,
SpvCapabilityCooperativeVectorTrainingNV = 5435,
SpvCapabilityRayTracingClusterAccelerationStructureNV = 5437,
SpvCapabilityTensorAddressingNV = 5439,
SpvCapabilitySubgroupShuffleINTEL = 5568,
SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
@ -1226,11 +1252,13 @@ typedef enum SpvCapability_ {
SpvCapabilityAtomicFloat32AddEXT = 6033,
SpvCapabilityAtomicFloat64AddEXT = 6034,
SpvCapabilityLongCompositesINTEL = 6089,
SpvCapabilityOptNoneEXT = 6094,
SpvCapabilityOptNoneINTEL = 6094,
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilityBFloat16ConversionINTEL = 6115,
SpvCapabilitySplitBarrierINTEL = 6141,
SpvCapabilityArithmeticFenceEXT = 6144,
SpvCapabilityFPGAClusterAttributesV2INTEL = 6150,
SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
SpvCapabilityFPMaxErrorINTEL = 6169,
@ -1239,6 +1267,10 @@ typedef enum SpvCapability_ {
SpvCapabilityGlobalVariableHostAccessINTEL = 6187,
SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189,
SpvCapabilitySubgroupBufferPrefetchINTEL = 6220,
SpvCapabilitySubgroup2DBlockIOINTEL = 6228,
SpvCapabilitySubgroup2DBlockTransformINTEL = 6229,
SpvCapabilitySubgroup2DBlockTransposeINTEL = 6230,
SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMaskedGatherScatterINTEL = 6427,
SpvCapabilityCacheControlsINTEL = 6441,
@ -1255,6 +1287,7 @@ typedef enum SpvRayFlagsShift_ {
SpvRayFlagsCullFrontFacingTrianglesKHRShift = 5,
SpvRayFlagsCullOpaqueKHRShift = 6,
SpvRayFlagsCullNoOpaqueKHRShift = 7,
SpvRayFlagsSkipBuiltinPrimitivesNVShift = 8,
SpvRayFlagsSkipTrianglesKHRShift = 8,
SpvRayFlagsSkipAABBsKHRShift = 9,
SpvRayFlagsForceOpacityMicromap2StateEXTShift = 10,
@ -1271,6 +1304,7 @@ typedef enum SpvRayFlagsMask_ {
SpvRayFlagsCullFrontFacingTrianglesKHRMask = 0x00000020,
SpvRayFlagsCullOpaqueKHRMask = 0x00000040,
SpvRayFlagsCullNoOpaqueKHRMask = 0x00000080,
SpvRayFlagsSkipBuiltinPrimitivesNVMask = 0x00000100,
SpvRayFlagsSkipTrianglesKHRMask = 0x00000100,
SpvRayFlagsSkipAABBsKHRMask = 0x00000200,
SpvRayFlagsForceOpacityMicromap2StateEXTMask = 0x00000400,
@ -1382,6 +1416,41 @@ typedef enum SpvCooperativeMatrixUse_ {
SpvCooperativeMatrixUseMax = 0x7fffffff,
} SpvCooperativeMatrixUse;
typedef enum SpvCooperativeMatrixReduceShift_ {
SpvCooperativeMatrixReduceRowShift = 0,
SpvCooperativeMatrixReduceColumnShift = 1,
SpvCooperativeMatrixReduce2x2Shift = 2,
SpvCooperativeMatrixReduceMax = 0x7fffffff,
} SpvCooperativeMatrixReduceShift;
typedef enum SpvCooperativeMatrixReduceMask_ {
SpvCooperativeMatrixReduceMaskNone = 0,
SpvCooperativeMatrixReduceRowMask = 0x00000001,
SpvCooperativeMatrixReduceColumnMask = 0x00000002,
SpvCooperativeMatrixReduce2x2Mask = 0x00000004,
} SpvCooperativeMatrixReduceMask;
typedef enum SpvTensorClampMode_ {
SpvTensorClampModeUndefined = 0,
SpvTensorClampModeConstant = 1,
SpvTensorClampModeClampToEdge = 2,
SpvTensorClampModeRepeat = 3,
SpvTensorClampModeRepeatMirrored = 4,
SpvTensorClampModeMax = 0x7fffffff,
} SpvTensorClampMode;
typedef enum SpvTensorAddressingOperandsShift_ {
SpvTensorAddressingOperandsTensorViewShift = 0,
SpvTensorAddressingOperandsDecodeFuncShift = 1,
SpvTensorAddressingOperandsMax = 0x7fffffff,
} SpvTensorAddressingOperandsShift;
typedef enum SpvTensorAddressingOperandsMask_ {
SpvTensorAddressingOperandsMaskNone = 0,
SpvTensorAddressingOperandsTensorViewMask = 0x00000001,
SpvTensorAddressingOperandsDecodeFuncMask = 0x00000002,
} SpvTensorAddressingOperandsMask;
typedef enum SpvInitializationModeQualifier_ {
SpvInitializationModeQualifierInitOnDeviceReprogramINTEL = 0,
SpvInitializationModeQualifierInitOnDeviceResetINTEL = 1,
@ -1418,6 +1487,42 @@ typedef enum SpvNamedMaximumNumberOfRegisters_ {
SpvNamedMaximumNumberOfRegistersMax = 0x7fffffff,
} SpvNamedMaximumNumberOfRegisters;
typedef enum SpvMatrixMultiplyAccumulateOperandsShift_ {
SpvMatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELShift = 0,
SpvMatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELShift = 1,
SpvMatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELShift = 2,
SpvMatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELShift = 3,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELShift = 4,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELShift = 5,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELShift = 6,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELShift = 7,
SpvMatrixMultiplyAccumulateOperandsMatrixATF32INTELShift = 8,
SpvMatrixMultiplyAccumulateOperandsMatrixBTF32INTELShift = 9,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELShift = 10,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELShift = 11,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELShift = 12,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELShift = 13,
SpvMatrixMultiplyAccumulateOperandsMax = 0x7fffffff,
} SpvMatrixMultiplyAccumulateOperandsShift;
typedef enum SpvMatrixMultiplyAccumulateOperandsMask_ {
SpvMatrixMultiplyAccumulateOperandsMaskNone = 0,
SpvMatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELMask = 0x00000001,
SpvMatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELMask = 0x00000002,
SpvMatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELMask = 0x00000004,
SpvMatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELMask = 0x00000008,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELMask = 0x00000010,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELMask = 0x00000020,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELMask = 0x00000040,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELMask = 0x00000080,
SpvMatrixMultiplyAccumulateOperandsMatrixATF32INTELMask = 0x00000100,
SpvMatrixMultiplyAccumulateOperandsMatrixBTF32INTELMask = 0x00000200,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELMask = 0x00000400,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELMask = 0x00000800,
SpvMatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELMask = 0x00001000,
SpvMatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELMask = 0x00002000,
} SpvMatrixMultiplyAccumulateOperandsMask;
typedef enum SpvRawAccessChainOperandsShift_ {
SpvRawAccessChainOperandsRobustnessPerComponentNVShift = 0,
SpvRawAccessChainOperandsRobustnessPerElementNVShift = 1,
@ -1434,6 +1539,33 @@ typedef enum SpvFPEncoding_ {
SpvFPEncodingMax = 0x7fffffff,
} SpvFPEncoding;
typedef enum SpvCooperativeVectorMatrixLayout_ {
SpvCooperativeVectorMatrixLayoutRowMajorNV = 0,
SpvCooperativeVectorMatrixLayoutColumnMajorNV = 1,
SpvCooperativeVectorMatrixLayoutInferencingOptimalNV = 2,
SpvCooperativeVectorMatrixLayoutTrainingOptimalNV = 3,
SpvCooperativeVectorMatrixLayoutMax = 0x7fffffff,
} SpvCooperativeVectorMatrixLayout;
typedef enum SpvComponentType_ {
SpvComponentTypeFloat16NV = 0,
SpvComponentTypeFloat32NV = 1,
SpvComponentTypeFloat64NV = 2,
SpvComponentTypeSignedInt8NV = 3,
SpvComponentTypeSignedInt16NV = 4,
SpvComponentTypeSignedInt32NV = 5,
SpvComponentTypeSignedInt64NV = 6,
SpvComponentTypeUnsignedInt8NV = 7,
SpvComponentTypeUnsignedInt16NV = 8,
SpvComponentTypeUnsignedInt32NV = 9,
SpvComponentTypeUnsignedInt64NV = 10,
SpvComponentTypeSignedInt8PackedNV = 1000491000,
SpvComponentTypeUnsignedInt8PackedNV = 1000491001,
SpvComponentTypeFloatE4M3NV = 1000491002,
SpvComponentTypeFloatE5M2NV = 1000491003,
SpvComponentTypeMax = 0x7fffffff,
} SpvComponentType;
typedef enum SpvOp_ {
SpvOpNop = 0,
SpvOpUndef = 1,
@ -1850,9 +1982,14 @@ typedef enum SpvOp_ {
SpvOpFragmentMaskFetchAMD = 5011,
SpvOpFragmentFetchAMD = 5012,
SpvOpReadClockKHR = 5056,
SpvOpFinalizeNodePayloadsAMDX = 5075,
SpvOpAllocateNodePayloadsAMDX = 5074,
SpvOpEnqueueNodePayloadsAMDX = 5075,
SpvOpTypeNodePayloadArrayAMDX = 5076,
SpvOpFinishWritingNodePayloadAMDX = 5078,
SpvOpInitializeNodePayloadsAMDX = 5090,
SpvOpNodePayloadArrayLengthAMDX = 5090,
SpvOpIsNodePayloadValidAMDX = 5101,
SpvOpConstantStringAMDX = 5103,
SpvOpSpecConstantStringAMDX = 5104,
SpvOpGroupNonUniformQuadAllKHR = 5110,
SpvOpGroupNonUniformQuadAnyKHR = 5111,
SpvOpHitObjectRecordHitMotionNV = 5249,
@ -1889,12 +2026,20 @@ typedef enum SpvOp_ {
SpvOpReorderThreadWithHintNV = 5280,
SpvOpTypeHitObjectNV = 5281,
SpvOpImageSampleFootprintNV = 5283,
SpvOpTypeCooperativeVectorNV = 5288,
SpvOpCooperativeVectorMatrixMulNV = 5289,
SpvOpCooperativeVectorOuterProductAccumulateNV = 5290,
SpvOpCooperativeVectorReduceSumAccumulateNV = 5291,
SpvOpCooperativeVectorMatrixMulAddNV = 5292,
SpvOpCooperativeMatrixConvertNV = 5293,
SpvOpEmitMeshTasksEXT = 5294,
SpvOpSetMeshOutputsEXT = 5295,
SpvOpGroupNonUniformPartitionNV = 5296,
SpvOpWritePackedPrimitiveIndices4x8NV = 5299,
SpvOpFetchMicroTriangleVertexPositionNV = 5300,
SpvOpFetchMicroTriangleVertexBarycentricNV = 5301,
SpvOpCooperativeVectorLoadNV = 5302,
SpvOpCooperativeVectorStoreNV = 5303,
SpvOpReportIntersectionKHR = 5334,
SpvOpReportIntersectionNV = 5334,
SpvOpIgnoreIntersectionNV = 5335,
@ -1906,6 +2051,8 @@ typedef enum SpvOp_ {
SpvOpTypeAccelerationStructureKHR = 5341,
SpvOpTypeAccelerationStructureNV = 5341,
SpvOpExecuteCallableNV = 5344,
SpvOpRayQueryGetClusterIdNV = 5345,
SpvOpHitObjectGetClusterIdNV = 5346,
SpvOpTypeCooperativeMatrixNV = 5358,
SpvOpCooperativeMatrixLoadNV = 5359,
SpvOpCooperativeMatrixStoreNV = 5360,
@ -1913,9 +2060,26 @@ typedef enum SpvOp_ {
SpvOpCooperativeMatrixLengthNV = 5362,
SpvOpBeginInvocationInterlockEXT = 5364,
SpvOpEndInvocationInterlockEXT = 5365,
SpvOpCooperativeMatrixReduceNV = 5366,
SpvOpCooperativeMatrixLoadTensorNV = 5367,
SpvOpCooperativeMatrixStoreTensorNV = 5368,
SpvOpCooperativeMatrixPerElementOpNV = 5369,
SpvOpTypeTensorLayoutNV = 5370,
SpvOpTypeTensorViewNV = 5371,
SpvOpCreateTensorLayoutNV = 5372,
SpvOpTensorLayoutSetDimensionNV = 5373,
SpvOpTensorLayoutSetStrideNV = 5374,
SpvOpTensorLayoutSliceNV = 5375,
SpvOpTensorLayoutSetClampValueNV = 5376,
SpvOpCreateTensorViewNV = 5377,
SpvOpTensorViewSetDimensionNV = 5378,
SpvOpTensorViewSetStrideNV = 5379,
SpvOpDemoteToHelperInvocation = 5380,
SpvOpDemoteToHelperInvocationEXT = 5380,
SpvOpIsHelperInvocationEXT = 5381,
SpvOpTensorViewSetClipNV = 5382,
SpvOpTensorLayoutSetBlockSizeNV = 5384,
SpvOpCooperativeMatrixTransposeNV = 5390,
SpvOpConvertUToImageNV = 5391,
SpvOpConvertUToSamplerNV = 5392,
SpvOpConvertImageToUNV = 5393,
@ -1924,6 +2088,19 @@ typedef enum SpvOp_ {
SpvOpConvertSampledImageToUNV = 5396,
SpvOpSamplerImageAddressingModeNV = 5397,
SpvOpRawAccessChainNV = 5398,
SpvOpRayQueryGetIntersectionSpherePositionNV = 5427,
SpvOpRayQueryGetIntersectionSphereRadiusNV = 5428,
SpvOpRayQueryGetIntersectionLSSPositionsNV = 5429,
SpvOpRayQueryGetIntersectionLSSRadiiNV = 5430,
SpvOpRayQueryGetIntersectionLSSHitValueNV = 5431,
SpvOpHitObjectGetSpherePositionNV = 5432,
SpvOpHitObjectGetSphereRadiusNV = 5433,
SpvOpHitObjectGetLSSPositionsNV = 5434,
SpvOpHitObjectGetLSSRadiiNV = 5435,
SpvOpHitObjectIsSphereHitNV = 5436,
SpvOpHitObjectIsLSSHitNV = 5437,
SpvOpRayQueryIsSphereHitNV = 5438,
SpvOpRayQueryIsLSSHitNV = 5439,
SpvOpSubgroupShuffleINTEL = 5571,
SpvOpSubgroupShuffleDownINTEL = 5572,
SpvOpSubgroupShuffleUpINTEL = 5573,
@ -2170,7 +2347,14 @@ typedef enum SpvOp_ {
SpvOpConvertBF16ToFINTEL = 6117,
SpvOpControlBarrierArriveINTEL = 6142,
SpvOpControlBarrierWaitINTEL = 6143,
SpvOpArithmeticFenceEXT = 6145,
SpvOpSubgroupBlockPrefetchINTEL = 6221,
SpvOpSubgroup2DBlockLoadINTEL = 6231,
SpvOpSubgroup2DBlockLoadTransformINTEL = 6232,
SpvOpSubgroup2DBlockLoadTransposeINTEL = 6233,
SpvOpSubgroup2DBlockPrefetchINTEL = 6234,
SpvOpSubgroup2DBlockStoreINTEL = 6235,
SpvOpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
SpvOpGroupIMulKHR = 6401,
SpvOpGroupFMulKHR = 6402,
SpvOpGroupBitwiseAndKHR = 6403,
@ -2601,9 +2785,14 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break;
case SpvOpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break;
case SpvOpReadClockKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case SpvOpAllocateNodePayloadsAMDX: *hasResult = true; *hasResultType = true; break;
case SpvOpEnqueueNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case SpvOpTypeNodePayloadArrayAMDX: *hasResult = true; *hasResultType = false; break;
case SpvOpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
case SpvOpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case SpvOpNodePayloadArrayLengthAMDX: *hasResult = true; *hasResultType = true; break;
case SpvOpIsNodePayloadValidAMDX: *hasResult = true; *hasResultType = true; break;
case SpvOpConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
case SpvOpSpecConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
case SpvOpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
@ -2640,12 +2829,20 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break;
case SpvOpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break;
case SpvOpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTypeCooperativeVectorNV: *hasResult = true; *hasResultType = false; break;
case SpvOpCooperativeVectorMatrixMulNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeVectorOuterProductAccumulateNV: *hasResult = false; *hasResultType = false; break;
case SpvOpCooperativeVectorReduceSumAccumulateNV: *hasResult = false; *hasResultType = false; break;
case SpvOpCooperativeVectorMatrixMulAddNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeMatrixConvertNV: *hasResult = true; *hasResultType = true; break;
case SpvOpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break;
case SpvOpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeVectorLoadNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeVectorStoreNV: *hasResult = false; *hasResultType = false; break;
case SpvOpReportIntersectionKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break;
case SpvOpTerminateRayNV: *hasResult = false; *hasResultType = false; break;
@ -2655,6 +2852,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpTypeAccelerationStructureKHR: *hasResult = true; *hasResultType = false; break;
case SpvOpExecuteCallableNV: *hasResult = false; *hasResultType = false; break;
case SpvOpRayQueryGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break;
case SpvOpCooperativeMatrixLoadNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeMatrixStoreNV: *hasResult = false; *hasResultType = false; break;
@ -2662,8 +2861,25 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
case SpvOpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpCooperativeMatrixReduceNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeMatrixLoadTensorNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeMatrixStoreTensorNV: *hasResult = false; *hasResultType = false; break;
case SpvOpCooperativeMatrixPerElementOpNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTypeTensorLayoutNV: *hasResult = true; *hasResultType = false; break;
case SpvOpTypeTensorViewNV: *hasResult = true; *hasResultType = false; break;
case SpvOpCreateTensorLayoutNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorLayoutSetDimensionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorLayoutSetStrideNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorLayoutSliceNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorLayoutSetClampValueNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCreateTensorViewNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorViewSetDimensionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorViewSetStrideNV: *hasResult = true; *hasResultType = true; break;
case SpvOpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
case SpvOpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorViewSetClipNV: *hasResult = true; *hasResultType = true; break;
case SpvOpTensorLayoutSetBlockSizeNV: *hasResult = true; *hasResultType = true; break;
case SpvOpCooperativeMatrixTransposeNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
@ -2672,6 +2888,19 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case SpvOpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryGetIntersectionSpherePositionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryGetIntersectionSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryGetIntersectionLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryGetIntersectionLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryGetIntersectionLSSHitValueNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectGetSpherePositionNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectGetSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectGetLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectGetLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
case SpvOpHitObjectIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
case SpvOpRayQueryIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@ -2698,7 +2927,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAsmTargetINTEL: *hasResult = true; *hasResultType = false; break;
case SpvOpAsmINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAsmCallINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAtomicFMinEXT: *hasResult = true; *hasResultType = true; break;
@ -2916,7 +3145,14 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpArithmeticFenceEXT: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockLoadINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockLoadTransformINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockLoadTransposeINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
@ -2944,6 +3180,7 @@ inline const char* SpvSourceLanguageToString(SpvSourceLanguage value) {
case SpvSourceLanguageWGSL: return "WGSL";
case SpvSourceLanguageSlang: return "Slang";
case SpvSourceLanguageZig: return "Zig";
case SpvSourceLanguageRust: return "Rust";
default: return "Unknown";
}
}
@ -3044,6 +3281,7 @@ inline const char* SpvExecutionModeToString(SpvExecutionMode value) {
case SpvExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD";
case SpvExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
case SpvExecutionModeCoalescingAMDX: return "CoalescingAMDX";
case SpvExecutionModeIsApiEntryAMDX: return "IsApiEntryAMDX";
case SpvExecutionModeMaxNodeRecursionAMDX: return "MaxNodeRecursionAMDX";
case SpvExecutionModeStaticNumWorkgroupsAMDX: return "StaticNumWorkgroupsAMDX";
case SpvExecutionModeShaderIndexAMDX: return "ShaderIndexAMDX";
@ -3056,6 +3294,7 @@ inline const char* SpvExecutionModeToString(SpvExecutionMode value) {
case SpvExecutionModeStencilRefLessBackAMD: return "StencilRefLessBackAMD";
case SpvExecutionModeQuadDerivativesKHR: return "QuadDerivativesKHR";
case SpvExecutionModeRequireFullQuadsKHR: return "RequireFullQuadsKHR";
case SpvExecutionModeSharesInputWithAMDX: return "SharesInputWithAMDX";
case SpvExecutionModeOutputLinesEXT: return "OutputLinesEXT";
case SpvExecutionModeOutputPrimitivesEXT: return "OutputPrimitivesEXT";
case SpvExecutionModeDerivativeGroupQuadsKHR: return "DerivativeGroupQuadsKHR";
@ -3106,7 +3345,6 @@ inline const char* SpvStorageClassToString(SpvStorageClass value) {
case SpvStorageClassStorageBuffer: return "StorageBuffer";
case SpvStorageClassTileImageEXT: return "TileImageEXT";
case SpvStorageClassNodePayloadAMDX: return "NodePayloadAMDX";
case SpvStorageClassNodeOutputPayloadAMDX: return "NodeOutputPayloadAMDX";
case SpvStorageClassCallableDataKHR: return "CallableDataKHR";
case SpvStorageClassIncomingCallableDataKHR: return "IncomingCallableDataKHR";
case SpvStorageClassRayPayloadKHR: return "RayPayloadKHR";
@ -3358,6 +3596,10 @@ inline const char* SpvDecorationToString(SpvDecoration value) {
case SpvDecorationNodeMaxPayloadsAMDX: return "NodeMaxPayloadsAMDX";
case SpvDecorationTrackFinishWritingAMDX: return "TrackFinishWritingAMDX";
case SpvDecorationPayloadNodeNameAMDX: return "PayloadNodeNameAMDX";
case SpvDecorationPayloadNodeBaseIndexAMDX: return "PayloadNodeBaseIndexAMDX";
case SpvDecorationPayloadNodeSparseArrayAMDX: return "PayloadNodeSparseArrayAMDX";
case SpvDecorationPayloadNodeArraySizeAMDX: return "PayloadNodeArraySizeAMDX";
case SpvDecorationPayloadDispatchIndirectAMDX: return "PayloadDispatchIndirectAMDX";
case SpvDecorationOverrideCoverageNV: return "OverrideCoverageNV";
case SpvDecorationPassthroughNV: return "PassthroughNV";
case SpvDecorationViewportRelativeNV: return "ViewportRelativeNV";
@ -3511,7 +3753,7 @@ inline const char* SpvBuiltInToString(SpvBuiltIn value) {
case SpvBuiltInBaryCoordSmoothSampleAMD: return "BaryCoordSmoothSampleAMD";
case SpvBuiltInBaryCoordPullModelAMD: return "BaryCoordPullModelAMD";
case SpvBuiltInFragStencilRefEXT: return "FragStencilRefEXT";
case SpvBuiltInCoalescedInputCountAMDX: return "CoalescedInputCountAMDX";
case SpvBuiltInRemainingRecursionLevelsAMDX: return "RemainingRecursionLevelsAMDX";
case SpvBuiltInShaderIndexAMDX: return "ShaderIndexAMDX";
case SpvBuiltInViewportMaskNV: return "ViewportMaskNV";
case SpvBuiltInSecondaryPositionNV: return "SecondaryPositionNV";
@ -3554,12 +3796,19 @@ inline const char* SpvBuiltInToString(SpvBuiltIn value) {
case SpvBuiltInHitMicroTriangleVertexBarycentricsNV: return "HitMicroTriangleVertexBarycentricsNV";
case SpvBuiltInIncomingRayFlagsKHR: return "IncomingRayFlagsKHR";
case SpvBuiltInRayGeometryIndexKHR: return "RayGeometryIndexKHR";
case SpvBuiltInHitIsSphereNV: return "HitIsSphereNV";
case SpvBuiltInHitIsLSSNV: return "HitIsLSSNV";
case SpvBuiltInHitSpherePositionNV: return "HitSpherePositionNV";
case SpvBuiltInWarpsPerSMNV: return "WarpsPerSMNV";
case SpvBuiltInSMCountNV: return "SMCountNV";
case SpvBuiltInWarpIDNV: return "WarpIDNV";
case SpvBuiltInSMIDNV: return "SMIDNV";
case SpvBuiltInHitLSSPositionsNV: return "HitLSSPositionsNV";
case SpvBuiltInHitKindFrontFacingMicroTriangleNV: return "HitKindFrontFacingMicroTriangleNV";
case SpvBuiltInHitKindBackFacingMicroTriangleNV: return "HitKindBackFacingMicroTriangleNV";
case SpvBuiltInHitSphereRadiusNV: return "HitSphereRadiusNV";
case SpvBuiltInHitLSSRadiiNV: return "HitLSSRadiiNV";
case SpvBuiltInClusterIDNV: return "ClusterIDNV";
case SpvBuiltInCullMaskKHR: return "CullMaskKHR";
default: return "Unknown";
}
@ -3765,9 +4014,20 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilityShaderInvocationReorderNV: return "ShaderInvocationReorderNV";
case SpvCapabilityBindlessTextureNV: return "BindlessTextureNV";
case SpvCapabilityRayQueryPositionFetchKHR: return "RayQueryPositionFetchKHR";
case SpvCapabilityCooperativeVectorNV: return "CooperativeVectorNV";
case SpvCapabilityAtomicFloat16VectorNV: return "AtomicFloat16VectorNV";
case SpvCapabilityRayTracingDisplacementMicromapNV: return "RayTracingDisplacementMicromapNV";
case SpvCapabilityRawAccessChainsNV: return "RawAccessChainsNV";
case SpvCapabilityRayTracingSpheresGeometryNV: return "RayTracingSpheresGeometryNV";
case SpvCapabilityRayTracingLinearSweptSpheresGeometryNV: return "RayTracingLinearSweptSpheresGeometryNV";
case SpvCapabilityCooperativeMatrixReductionsNV: return "CooperativeMatrixReductionsNV";
case SpvCapabilityCooperativeMatrixConversionsNV: return "CooperativeMatrixConversionsNV";
case SpvCapabilityCooperativeMatrixPerElementOperationsNV: return "CooperativeMatrixPerElementOperationsNV";
case SpvCapabilityCooperativeMatrixTensorAddressingNV: return "CooperativeMatrixTensorAddressingNV";
case SpvCapabilityCooperativeMatrixBlockLoadsNV: return "CooperativeMatrixBlockLoadsNV";
case SpvCapabilityCooperativeVectorTrainingNV: return "CooperativeVectorTrainingNV";
case SpvCapabilityRayTracingClusterAccelerationStructureNV: return "RayTracingClusterAccelerationStructureNV";
case SpvCapabilityTensorAddressingNV: return "TensorAddressingNV";
case SpvCapabilitySubgroupShuffleINTEL: return "SubgroupShuffleINTEL";
case SpvCapabilitySubgroupBufferBlockIOINTEL: return "SubgroupBufferBlockIOINTEL";
case SpvCapabilitySubgroupImageBlockIOINTEL: return "SubgroupImageBlockIOINTEL";
@ -3823,11 +4083,12 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
case SpvCapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
case SpvCapabilityLongCompositesINTEL: return "LongCompositesINTEL";
case SpvCapabilityOptNoneINTEL: return "OptNoneINTEL";
case SpvCapabilityOptNoneEXT: return "OptNoneEXT";
case SpvCapabilityAtomicFloat16AddEXT: return "AtomicFloat16AddEXT";
case SpvCapabilityDebugInfoModuleINTEL: return "DebugInfoModuleINTEL";
case SpvCapabilityBFloat16ConversionINTEL: return "BFloat16ConversionINTEL";
case SpvCapabilitySplitBarrierINTEL: return "SplitBarrierINTEL";
case SpvCapabilityArithmeticFenceEXT: return "ArithmeticFenceEXT";
case SpvCapabilityFPGAClusterAttributesV2INTEL: return "FPGAClusterAttributesV2INTEL";
case SpvCapabilityFPGAKernelAttributesv2INTEL: return "FPGAKernelAttributesv2INTEL";
case SpvCapabilityFPMaxErrorINTEL: return "FPMaxErrorINTEL";
@ -3836,6 +4097,10 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilityGlobalVariableHostAccessINTEL: return "GlobalVariableHostAccessINTEL";
case SpvCapabilityGlobalVariableFPGADecorationsINTEL: return "GlobalVariableFPGADecorationsINTEL";
case SpvCapabilitySubgroupBufferPrefetchINTEL: return "SubgroupBufferPrefetchINTEL";
case SpvCapabilitySubgroup2DBlockIOINTEL: return "Subgroup2DBlockIOINTEL";
case SpvCapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
case SpvCapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
case SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
case SpvCapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
case SpvCapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
case SpvCapabilityCacheControlsINTEL: return "CacheControlsINTEL";
@ -3935,6 +4200,17 @@ inline const char* SpvCooperativeMatrixUseToString(SpvCooperativeMatrixUse value
}
}
inline const char* SpvTensorClampModeToString(SpvTensorClampMode value) {
switch (value) {
case SpvTensorClampModeUndefined: return "Undefined";
case SpvTensorClampModeConstant: return "Constant";
case SpvTensorClampModeClampToEdge: return "ClampToEdge";
case SpvTensorClampModeRepeat: return "Repeat";
case SpvTensorClampModeRepeatMirrored: return "RepeatMirrored";
default: return "Unknown";
}
}
inline const char* SpvInitializationModeQualifierToString(SpvInitializationModeQualifier value) {
switch (value) {
case SpvInitializationModeQualifierInitOnDeviceReprogramINTEL: return "InitOnDeviceReprogramINTEL";
@ -3987,6 +4263,37 @@ inline const char* SpvFPEncodingToString(SpvFPEncoding value) {
}
}
inline const char* SpvCooperativeVectorMatrixLayoutToString(SpvCooperativeVectorMatrixLayout value) {
switch (value) {
case SpvCooperativeVectorMatrixLayoutRowMajorNV: return "RowMajorNV";
case SpvCooperativeVectorMatrixLayoutColumnMajorNV: return "ColumnMajorNV";
case SpvCooperativeVectorMatrixLayoutInferencingOptimalNV: return "InferencingOptimalNV";
case SpvCooperativeVectorMatrixLayoutTrainingOptimalNV: return "TrainingOptimalNV";
default: return "Unknown";
}
}
inline const char* SpvComponentTypeToString(SpvComponentType value) {
switch (value) {
case SpvComponentTypeFloat16NV: return "Float16NV";
case SpvComponentTypeFloat32NV: return "Float32NV";
case SpvComponentTypeFloat64NV: return "Float64NV";
case SpvComponentTypeSignedInt8NV: return "SignedInt8NV";
case SpvComponentTypeSignedInt16NV: return "SignedInt16NV";
case SpvComponentTypeSignedInt32NV: return "SignedInt32NV";
case SpvComponentTypeSignedInt64NV: return "SignedInt64NV";
case SpvComponentTypeUnsignedInt8NV: return "UnsignedInt8NV";
case SpvComponentTypeUnsignedInt16NV: return "UnsignedInt16NV";
case SpvComponentTypeUnsignedInt32NV: return "UnsignedInt32NV";
case SpvComponentTypeUnsignedInt64NV: return "UnsignedInt64NV";
case SpvComponentTypeSignedInt8PackedNV: return "SignedInt8PackedNV";
case SpvComponentTypeUnsignedInt8PackedNV: return "UnsignedInt8PackedNV";
case SpvComponentTypeFloatE4M3NV: return "FloatE4M3NV";
case SpvComponentTypeFloatE5M2NV: return "FloatE5M2NV";
default: return "Unknown";
}
}
inline const char* SpvOpToString(SpvOp value) {
switch (value) {
case SpvOpNop: return "OpNop";
@ -4398,9 +4705,14 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpFragmentMaskFetchAMD: return "OpFragmentMaskFetchAMD";
case SpvOpFragmentFetchAMD: return "OpFragmentFetchAMD";
case SpvOpReadClockKHR: return "OpReadClockKHR";
case SpvOpFinalizeNodePayloadsAMDX: return "OpFinalizeNodePayloadsAMDX";
case SpvOpAllocateNodePayloadsAMDX: return "OpAllocateNodePayloadsAMDX";
case SpvOpEnqueueNodePayloadsAMDX: return "OpEnqueueNodePayloadsAMDX";
case SpvOpTypeNodePayloadArrayAMDX: return "OpTypeNodePayloadArrayAMDX";
case SpvOpFinishWritingNodePayloadAMDX: return "OpFinishWritingNodePayloadAMDX";
case SpvOpInitializeNodePayloadsAMDX: return "OpInitializeNodePayloadsAMDX";
case SpvOpNodePayloadArrayLengthAMDX: return "OpNodePayloadArrayLengthAMDX";
case SpvOpIsNodePayloadValidAMDX: return "OpIsNodePayloadValidAMDX";
case SpvOpConstantStringAMDX: return "OpConstantStringAMDX";
case SpvOpSpecConstantStringAMDX: return "OpSpecConstantStringAMDX";
case SpvOpGroupNonUniformQuadAllKHR: return "OpGroupNonUniformQuadAllKHR";
case SpvOpGroupNonUniformQuadAnyKHR: return "OpGroupNonUniformQuadAnyKHR";
case SpvOpHitObjectRecordHitMotionNV: return "OpHitObjectRecordHitMotionNV";
@ -4437,12 +4749,20 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpReorderThreadWithHintNV: return "OpReorderThreadWithHintNV";
case SpvOpTypeHitObjectNV: return "OpTypeHitObjectNV";
case SpvOpImageSampleFootprintNV: return "OpImageSampleFootprintNV";
case SpvOpTypeCooperativeVectorNV: return "OpTypeCooperativeVectorNV";
case SpvOpCooperativeVectorMatrixMulNV: return "OpCooperativeVectorMatrixMulNV";
case SpvOpCooperativeVectorOuterProductAccumulateNV: return "OpCooperativeVectorOuterProductAccumulateNV";
case SpvOpCooperativeVectorReduceSumAccumulateNV: return "OpCooperativeVectorReduceSumAccumulateNV";
case SpvOpCooperativeVectorMatrixMulAddNV: return "OpCooperativeVectorMatrixMulAddNV";
case SpvOpCooperativeMatrixConvertNV: return "OpCooperativeMatrixConvertNV";
case SpvOpEmitMeshTasksEXT: return "OpEmitMeshTasksEXT";
case SpvOpSetMeshOutputsEXT: return "OpSetMeshOutputsEXT";
case SpvOpGroupNonUniformPartitionNV: return "OpGroupNonUniformPartitionNV";
case SpvOpWritePackedPrimitiveIndices4x8NV: return "OpWritePackedPrimitiveIndices4x8NV";
case SpvOpFetchMicroTriangleVertexPositionNV: return "OpFetchMicroTriangleVertexPositionNV";
case SpvOpFetchMicroTriangleVertexBarycentricNV: return "OpFetchMicroTriangleVertexBarycentricNV";
case SpvOpCooperativeVectorLoadNV: return "OpCooperativeVectorLoadNV";
case SpvOpCooperativeVectorStoreNV: return "OpCooperativeVectorStoreNV";
case SpvOpReportIntersectionKHR: return "OpReportIntersectionKHR";
case SpvOpIgnoreIntersectionNV: return "OpIgnoreIntersectionNV";
case SpvOpTerminateRayNV: return "OpTerminateRayNV";
@ -4452,6 +4772,8 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpRayQueryGetIntersectionTriangleVertexPositionsKHR: return "OpRayQueryGetIntersectionTriangleVertexPositionsKHR";
case SpvOpTypeAccelerationStructureKHR: return "OpTypeAccelerationStructureKHR";
case SpvOpExecuteCallableNV: return "OpExecuteCallableNV";
case SpvOpRayQueryGetClusterIdNV: return "OpRayQueryGetClusterIdNV";
case SpvOpHitObjectGetClusterIdNV: return "OpHitObjectGetClusterIdNV";
case SpvOpTypeCooperativeMatrixNV: return "OpTypeCooperativeMatrixNV";
case SpvOpCooperativeMatrixLoadNV: return "OpCooperativeMatrixLoadNV";
case SpvOpCooperativeMatrixStoreNV: return "OpCooperativeMatrixStoreNV";
@ -4459,8 +4781,25 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpCooperativeMatrixLengthNV: return "OpCooperativeMatrixLengthNV";
case SpvOpBeginInvocationInterlockEXT: return "OpBeginInvocationInterlockEXT";
case SpvOpEndInvocationInterlockEXT: return "OpEndInvocationInterlockEXT";
case SpvOpCooperativeMatrixReduceNV: return "OpCooperativeMatrixReduceNV";
case SpvOpCooperativeMatrixLoadTensorNV: return "OpCooperativeMatrixLoadTensorNV";
case SpvOpCooperativeMatrixStoreTensorNV: return "OpCooperativeMatrixStoreTensorNV";
case SpvOpCooperativeMatrixPerElementOpNV: return "OpCooperativeMatrixPerElementOpNV";
case SpvOpTypeTensorLayoutNV: return "OpTypeTensorLayoutNV";
case SpvOpTypeTensorViewNV: return "OpTypeTensorViewNV";
case SpvOpCreateTensorLayoutNV: return "OpCreateTensorLayoutNV";
case SpvOpTensorLayoutSetDimensionNV: return "OpTensorLayoutSetDimensionNV";
case SpvOpTensorLayoutSetStrideNV: return "OpTensorLayoutSetStrideNV";
case SpvOpTensorLayoutSliceNV: return "OpTensorLayoutSliceNV";
case SpvOpTensorLayoutSetClampValueNV: return "OpTensorLayoutSetClampValueNV";
case SpvOpCreateTensorViewNV: return "OpCreateTensorViewNV";
case SpvOpTensorViewSetDimensionNV: return "OpTensorViewSetDimensionNV";
case SpvOpTensorViewSetStrideNV: return "OpTensorViewSetStrideNV";
case SpvOpDemoteToHelperInvocation: return "OpDemoteToHelperInvocation";
case SpvOpIsHelperInvocationEXT: return "OpIsHelperInvocationEXT";
case SpvOpTensorViewSetClipNV: return "OpTensorViewSetClipNV";
case SpvOpTensorLayoutSetBlockSizeNV: return "OpTensorLayoutSetBlockSizeNV";
case SpvOpCooperativeMatrixTransposeNV: return "OpCooperativeMatrixTransposeNV";
case SpvOpConvertUToImageNV: return "OpConvertUToImageNV";
case SpvOpConvertUToSamplerNV: return "OpConvertUToSamplerNV";
case SpvOpConvertImageToUNV: return "OpConvertImageToUNV";
@ -4469,6 +4808,19 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpConvertSampledImageToUNV: return "OpConvertSampledImageToUNV";
case SpvOpSamplerImageAddressingModeNV: return "OpSamplerImageAddressingModeNV";
case SpvOpRawAccessChainNV: return "OpRawAccessChainNV";
case SpvOpRayQueryGetIntersectionSpherePositionNV: return "OpRayQueryGetIntersectionSpherePositionNV";
case SpvOpRayQueryGetIntersectionSphereRadiusNV: return "OpRayQueryGetIntersectionSphereRadiusNV";
case SpvOpRayQueryGetIntersectionLSSPositionsNV: return "OpRayQueryGetIntersectionLSSPositionsNV";
case SpvOpRayQueryGetIntersectionLSSRadiiNV: return "OpRayQueryGetIntersectionLSSRadiiNV";
case SpvOpRayQueryGetIntersectionLSSHitValueNV: return "OpRayQueryGetIntersectionLSSHitValueNV";
case SpvOpHitObjectGetSpherePositionNV: return "OpHitObjectGetSpherePositionNV";
case SpvOpHitObjectGetSphereRadiusNV: return "OpHitObjectGetSphereRadiusNV";
case SpvOpHitObjectGetLSSPositionsNV: return "OpHitObjectGetLSSPositionsNV";
case SpvOpHitObjectGetLSSRadiiNV: return "OpHitObjectGetLSSRadiiNV";
case SpvOpHitObjectIsSphereHitNV: return "OpHitObjectIsSphereHitNV";
case SpvOpHitObjectIsLSSHitNV: return "OpHitObjectIsLSSHitNV";
case SpvOpRayQueryIsSphereHitNV: return "OpRayQueryIsSphereHitNV";
case SpvOpRayQueryIsLSSHitNV: return "OpRayQueryIsLSSHitNV";
case SpvOpSubgroupShuffleINTEL: return "OpSubgroupShuffleINTEL";
case SpvOpSubgroupShuffleDownINTEL: return "OpSubgroupShuffleDownINTEL";
case SpvOpSubgroupShuffleUpINTEL: return "OpSubgroupShuffleUpINTEL";
@ -4713,7 +5065,14 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpConvertBF16ToFINTEL: return "OpConvertBF16ToFINTEL";
case SpvOpControlBarrierArriveINTEL: return "OpControlBarrierArriveINTEL";
case SpvOpControlBarrierWaitINTEL: return "OpControlBarrierWaitINTEL";
case SpvOpArithmeticFenceEXT: return "OpArithmeticFenceEXT";
case SpvOpSubgroupBlockPrefetchINTEL: return "OpSubgroupBlockPrefetchINTEL";
case SpvOpSubgroup2DBlockLoadINTEL: return "OpSubgroup2DBlockLoadINTEL";
case SpvOpSubgroup2DBlockLoadTransformINTEL: return "OpSubgroup2DBlockLoadTransformINTEL";
case SpvOpSubgroup2DBlockLoadTransposeINTEL: return "OpSubgroup2DBlockLoadTransposeINTEL";
case SpvOpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
case SpvOpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";
case SpvOpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";

397
include/vulkan/spirv-headers/spirv.hpp
View file

@ -12,7 +12,7 @@
//
// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
//
// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -74,6 +74,7 @@ enum SourceLanguage {
SourceLanguageWGSL = 10,
SourceLanguageSlang = 11,
SourceLanguageZig = 12,
SourceLanguageRust = 13,
SourceLanguageMax = 0x7fffffff,
};
@ -174,6 +175,7 @@ enum ExecutionMode {
ExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
ExecutionModeStencilRefReplacingEXT = 5027,
ExecutionModeCoalescingAMDX = 5069,
ExecutionModeIsApiEntryAMDX = 5070,
ExecutionModeMaxNodeRecursionAMDX = 5071,
ExecutionModeStaticNumWorkgroupsAMDX = 5072,
ExecutionModeShaderIndexAMDX = 5073,
@ -186,6 +188,7 @@ enum ExecutionMode {
ExecutionModeStencilRefLessBackAMD = 5084,
ExecutionModeQuadDerivativesKHR = 5088,
ExecutionModeRequireFullQuadsKHR = 5089,
ExecutionModeSharesInputWithAMDX = 5102,
ExecutionModeOutputLinesEXT = 5269,
ExecutionModeOutputLinesNV = 5269,
ExecutionModeOutputPrimitivesEXT = 5270,
@ -239,7 +242,6 @@ enum StorageClass {
StorageClassStorageBuffer = 12,
StorageClassTileImageEXT = 4172,
StorageClassNodePayloadAMDX = 5068,
StorageClassNodeOutputPayloadAMDX = 5076,
StorageClassCallableDataKHR = 5328,
StorageClassCallableDataNV = 5328,
StorageClassIncomingCallableDataKHR = 5329,
@ -552,6 +554,10 @@ enum Decoration {
DecorationNodeMaxPayloadsAMDX = 5020,
DecorationTrackFinishWritingAMDX = 5078,
DecorationPayloadNodeNameAMDX = 5091,
DecorationPayloadNodeBaseIndexAMDX = 5098,
DecorationPayloadNodeSparseArrayAMDX = 5099,
DecorationPayloadNodeArraySizeAMDX = 5100,
DecorationPayloadDispatchIndirectAMDX = 5105,
DecorationOverrideCoverageNV = 5248,
DecorationPassthroughNV = 5250,
DecorationViewportRelativeNV = 5252,
@ -715,7 +721,7 @@ enum BuiltIn {
BuiltInBaryCoordSmoothSampleAMD = 4997,
BuiltInBaryCoordPullModelAMD = 4998,
BuiltInFragStencilRefEXT = 5014,
BuiltInCoalescedInputCountAMDX = 5021,
BuiltInRemainingRecursionLevelsAMDX = 5021,
BuiltInShaderIndexAMDX = 5073,
BuiltInViewportMaskNV = 5253,
BuiltInSecondaryPositionNV = 5257,
@ -775,12 +781,19 @@ enum BuiltIn {
BuiltInIncomingRayFlagsKHR = 5351,
BuiltInIncomingRayFlagsNV = 5351,
BuiltInRayGeometryIndexKHR = 5352,
BuiltInHitIsSphereNV = 5359,
BuiltInHitIsLSSNV = 5360,
BuiltInHitSpherePositionNV = 5361,
BuiltInWarpsPerSMNV = 5374,
BuiltInSMCountNV = 5375,
BuiltInWarpIDNV = 5376,
BuiltInSMIDNV = 5377,
BuiltInHitLSSPositionsNV = 5396,
BuiltInHitKindFrontFacingMicroTriangleNV = 5405,
BuiltInHitKindBackFacingMicroTriangleNV = 5406,
BuiltInHitSphereRadiusNV = 5420,
BuiltInHitLSSRadiiNV = 5421,
BuiltInClusterIDNV = 5436,
BuiltInCullMaskKHR = 6021,
BuiltInMax = 0x7fffffff,
};
@ -848,6 +861,7 @@ enum FunctionControlShift {
FunctionControlDontInlineShift = 1,
FunctionControlPureShift = 2,
FunctionControlConstShift = 3,
FunctionControlOptNoneEXTShift = 16,
FunctionControlOptNoneINTELShift = 16,
FunctionControlMax = 0x7fffffff,
};
@ -858,6 +872,7 @@ enum FunctionControlMask {
FunctionControlDontInlineMask = 0x00000002,
FunctionControlPureMask = 0x00000004,
FunctionControlConstMask = 0x00000008,
FunctionControlOptNoneEXTMask = 0x00010000,
FunctionControlOptNoneINTELMask = 0x00010000,
};
@ -1160,9 +1175,20 @@ enum Capability {
CapabilityShaderInvocationReorderNV = 5383,
CapabilityBindlessTextureNV = 5390,
CapabilityRayQueryPositionFetchKHR = 5391,
CapabilityCooperativeVectorNV = 5394,
CapabilityAtomicFloat16VectorNV = 5404,
CapabilityRayTracingDisplacementMicromapNV = 5409,
CapabilityRawAccessChainsNV = 5414,
CapabilityRayTracingSpheresGeometryNV = 5418,
CapabilityRayTracingLinearSweptSpheresGeometryNV = 5419,
CapabilityCooperativeMatrixReductionsNV = 5430,
CapabilityCooperativeMatrixConversionsNV = 5431,
CapabilityCooperativeMatrixPerElementOperationsNV = 5432,
CapabilityCooperativeMatrixTensorAddressingNV = 5433,
CapabilityCooperativeMatrixBlockLoadsNV = 5434,
CapabilityCooperativeVectorTrainingNV = 5435,
CapabilityRayTracingClusterAccelerationStructureNV = 5437,
CapabilityTensorAddressingNV = 5439,
CapabilitySubgroupShuffleINTEL = 5568,
CapabilitySubgroupBufferBlockIOINTEL = 5569,
CapabilitySubgroupImageBlockIOINTEL = 5570,
@ -1222,11 +1248,13 @@ enum Capability {
CapabilityAtomicFloat32AddEXT = 6033,
CapabilityAtomicFloat64AddEXT = 6034,
CapabilityLongCompositesINTEL = 6089,
CapabilityOptNoneEXT = 6094,
CapabilityOptNoneINTEL = 6094,
CapabilityAtomicFloat16AddEXT = 6095,
CapabilityDebugInfoModuleINTEL = 6114,
CapabilityBFloat16ConversionINTEL = 6115,
CapabilitySplitBarrierINTEL = 6141,
CapabilityArithmeticFenceEXT = 6144,
CapabilityFPGAClusterAttributesV2INTEL = 6150,
CapabilityFPGAKernelAttributesv2INTEL = 6161,
CapabilityFPMaxErrorINTEL = 6169,
@ -1235,6 +1263,10 @@ enum Capability {
CapabilityGlobalVariableHostAccessINTEL = 6187,
CapabilityGlobalVariableFPGADecorationsINTEL = 6189,
CapabilitySubgroupBufferPrefetchINTEL = 6220,
CapabilitySubgroup2DBlockIOINTEL = 6228,
CapabilitySubgroup2DBlockTransformINTEL = 6229,
CapabilitySubgroup2DBlockTransposeINTEL = 6230,
CapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMaskedGatherScatterINTEL = 6427,
CapabilityCacheControlsINTEL = 6441,
@ -1251,6 +1283,7 @@ enum RayFlagsShift {
RayFlagsCullFrontFacingTrianglesKHRShift = 5,
RayFlagsCullOpaqueKHRShift = 6,
RayFlagsCullNoOpaqueKHRShift = 7,
RayFlagsSkipBuiltinPrimitivesNVShift = 8,
RayFlagsSkipTrianglesKHRShift = 8,
RayFlagsSkipAABBsKHRShift = 9,
RayFlagsForceOpacityMicromap2StateEXTShift = 10,
@ -1267,6 +1300,7 @@ enum RayFlagsMask {
RayFlagsCullFrontFacingTrianglesKHRMask = 0x00000020,
RayFlagsCullOpaqueKHRMask = 0x00000040,
RayFlagsCullNoOpaqueKHRMask = 0x00000080,
RayFlagsSkipBuiltinPrimitivesNVMask = 0x00000100,
RayFlagsSkipTrianglesKHRMask = 0x00000100,
RayFlagsSkipAABBsKHRMask = 0x00000200,
RayFlagsForceOpacityMicromap2StateEXTMask = 0x00000400,
@ -1378,6 +1412,41 @@ enum CooperativeMatrixUse {
CooperativeMatrixUseMax = 0x7fffffff,
};
enum CooperativeMatrixReduceShift {
CooperativeMatrixReduceRowShift = 0,
CooperativeMatrixReduceColumnShift = 1,
CooperativeMatrixReduce2x2Shift = 2,
CooperativeMatrixReduceMax = 0x7fffffff,
};
enum CooperativeMatrixReduceMask {
CooperativeMatrixReduceMaskNone = 0,
CooperativeMatrixReduceRowMask = 0x00000001,
CooperativeMatrixReduceColumnMask = 0x00000002,
CooperativeMatrixReduce2x2Mask = 0x00000004,
};
enum TensorClampMode {
TensorClampModeUndefined = 0,
TensorClampModeConstant = 1,
TensorClampModeClampToEdge = 2,
TensorClampModeRepeat = 3,
TensorClampModeRepeatMirrored = 4,
TensorClampModeMax = 0x7fffffff,
};
enum TensorAddressingOperandsShift {
TensorAddressingOperandsTensorViewShift = 0,
TensorAddressingOperandsDecodeFuncShift = 1,
TensorAddressingOperandsMax = 0x7fffffff,
};
enum TensorAddressingOperandsMask {
TensorAddressingOperandsMaskNone = 0,
TensorAddressingOperandsTensorViewMask = 0x00000001,
TensorAddressingOperandsDecodeFuncMask = 0x00000002,
};
enum InitializationModeQualifier {
InitializationModeQualifierInitOnDeviceReprogramINTEL = 0,
InitializationModeQualifierInitOnDeviceResetINTEL = 1,
@ -1414,6 +1483,42 @@ enum NamedMaximumNumberOfRegisters {
NamedMaximumNumberOfRegistersMax = 0x7fffffff,
};
enum MatrixMultiplyAccumulateOperandsShift {
MatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELShift = 0,
MatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELShift = 1,
MatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELShift = 2,
MatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELShift = 3,
MatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELShift = 4,
MatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELShift = 5,
MatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELShift = 6,
MatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELShift = 7,
MatrixMultiplyAccumulateOperandsMatrixATF32INTELShift = 8,
MatrixMultiplyAccumulateOperandsMatrixBTF32INTELShift = 9,
MatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELShift = 10,
MatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELShift = 11,
MatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELShift = 12,
MatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELShift = 13,
MatrixMultiplyAccumulateOperandsMax = 0x7fffffff,
};
enum MatrixMultiplyAccumulateOperandsMask {
MatrixMultiplyAccumulateOperandsMaskNone = 0,
MatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELMask = 0x00000001,
MatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELMask = 0x00000002,
MatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELMask = 0x00000004,
MatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELMask = 0x00000008,
MatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELMask = 0x00000010,
MatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELMask = 0x00000020,
MatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELMask = 0x00000040,
MatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELMask = 0x00000080,
MatrixMultiplyAccumulateOperandsMatrixATF32INTELMask = 0x00000100,
MatrixMultiplyAccumulateOperandsMatrixBTF32INTELMask = 0x00000200,
MatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELMask = 0x00000400,
MatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELMask = 0x00000800,
MatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELMask = 0x00001000,
MatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELMask = 0x00002000,
};
enum RawAccessChainOperandsShift {
RawAccessChainOperandsRobustnessPerComponentNVShift = 0,
RawAccessChainOperandsRobustnessPerElementNVShift = 1,
@ -1430,6 +1535,33 @@ enum FPEncoding {
FPEncodingMax = 0x7fffffff,
};
enum CooperativeVectorMatrixLayout {
CooperativeVectorMatrixLayoutRowMajorNV = 0,
CooperativeVectorMatrixLayoutColumnMajorNV = 1,
CooperativeVectorMatrixLayoutInferencingOptimalNV = 2,
CooperativeVectorMatrixLayoutTrainingOptimalNV = 3,
CooperativeVectorMatrixLayoutMax = 0x7fffffff,
};
enum ComponentType {
ComponentTypeFloat16NV = 0,
ComponentTypeFloat32NV = 1,
ComponentTypeFloat64NV = 2,
ComponentTypeSignedInt8NV = 3,
ComponentTypeSignedInt16NV = 4,
ComponentTypeSignedInt32NV = 5,
ComponentTypeSignedInt64NV = 6,
ComponentTypeUnsignedInt8NV = 7,
ComponentTypeUnsignedInt16NV = 8,
ComponentTypeUnsignedInt32NV = 9,
ComponentTypeUnsignedInt64NV = 10,
ComponentTypeSignedInt8PackedNV = 1000491000,
ComponentTypeUnsignedInt8PackedNV = 1000491001,
ComponentTypeFloatE4M3NV = 1000491002,
ComponentTypeFloatE5M2NV = 1000491003,
ComponentTypeMax = 0x7fffffff,
};
enum Op {
OpNop = 0,
OpUndef = 1,
@ -1846,9 +1978,14 @@ enum Op {
OpFragmentMaskFetchAMD = 5011,
OpFragmentFetchAMD = 5012,
OpReadClockKHR = 5056,
OpFinalizeNodePayloadsAMDX = 5075,
OpAllocateNodePayloadsAMDX = 5074,
OpEnqueueNodePayloadsAMDX = 5075,
OpTypeNodePayloadArrayAMDX = 5076,
OpFinishWritingNodePayloadAMDX = 5078,
OpInitializeNodePayloadsAMDX = 5090,
OpNodePayloadArrayLengthAMDX = 5090,
OpIsNodePayloadValidAMDX = 5101,
OpConstantStringAMDX = 5103,
OpSpecConstantStringAMDX = 5104,
OpGroupNonUniformQuadAllKHR = 5110,
OpGroupNonUniformQuadAnyKHR = 5111,
OpHitObjectRecordHitMotionNV = 5249,
@ -1885,12 +2022,20 @@ enum Op {
OpReorderThreadWithHintNV = 5280,
OpTypeHitObjectNV = 5281,
OpImageSampleFootprintNV = 5283,
OpTypeCooperativeVectorNV = 5288,
OpCooperativeVectorMatrixMulNV = 5289,
OpCooperativeVectorOuterProductAccumulateNV = 5290,
OpCooperativeVectorReduceSumAccumulateNV = 5291,
OpCooperativeVectorMatrixMulAddNV = 5292,
OpCooperativeMatrixConvertNV = 5293,
OpEmitMeshTasksEXT = 5294,
OpSetMeshOutputsEXT = 5295,
OpGroupNonUniformPartitionNV = 5296,
OpWritePackedPrimitiveIndices4x8NV = 5299,
OpFetchMicroTriangleVertexPositionNV = 5300,
OpFetchMicroTriangleVertexBarycentricNV = 5301,
OpCooperativeVectorLoadNV = 5302,
OpCooperativeVectorStoreNV = 5303,
OpReportIntersectionKHR = 5334,
OpReportIntersectionNV = 5334,
OpIgnoreIntersectionNV = 5335,
@ -1902,6 +2047,8 @@ enum Op {
OpTypeAccelerationStructureKHR = 5341,
OpTypeAccelerationStructureNV = 5341,
OpExecuteCallableNV = 5344,
OpRayQueryGetClusterIdNV = 5345,
OpHitObjectGetClusterIdNV = 5346,
OpTypeCooperativeMatrixNV = 5358,
OpCooperativeMatrixLoadNV = 5359,
OpCooperativeMatrixStoreNV = 5360,
@ -1909,9 +2056,26 @@ enum Op {
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpCooperativeMatrixReduceNV = 5366,
OpCooperativeMatrixLoadTensorNV = 5367,
OpCooperativeMatrixStoreTensorNV = 5368,
OpCooperativeMatrixPerElementOpNV = 5369,
OpTypeTensorLayoutNV = 5370,
OpTypeTensorViewNV = 5371,
OpCreateTensorLayoutNV = 5372,
OpTensorLayoutSetDimensionNV = 5373,
OpTensorLayoutSetStrideNV = 5374,
OpTensorLayoutSliceNV = 5375,
OpTensorLayoutSetClampValueNV = 5376,
OpCreateTensorViewNV = 5377,
OpTensorViewSetDimensionNV = 5378,
OpTensorViewSetStrideNV = 5379,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpTensorViewSetClipNV = 5382,
OpTensorLayoutSetBlockSizeNV = 5384,
OpCooperativeMatrixTransposeNV = 5390,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
@ -1920,6 +2084,19 @@ enum Op {
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpRawAccessChainNV = 5398,
OpRayQueryGetIntersectionSpherePositionNV = 5427,
OpRayQueryGetIntersectionSphereRadiusNV = 5428,
OpRayQueryGetIntersectionLSSPositionsNV = 5429,
OpRayQueryGetIntersectionLSSRadiiNV = 5430,
OpRayQueryGetIntersectionLSSHitValueNV = 5431,
OpHitObjectGetSpherePositionNV = 5432,
OpHitObjectGetSphereRadiusNV = 5433,
OpHitObjectGetLSSPositionsNV = 5434,
OpHitObjectGetLSSRadiiNV = 5435,
OpHitObjectIsSphereHitNV = 5436,
OpHitObjectIsLSSHitNV = 5437,
OpRayQueryIsSphereHitNV = 5438,
OpRayQueryIsLSSHitNV = 5439,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -2166,7 +2343,14 @@ enum Op {
OpConvertBF16ToFINTEL = 6117,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpArithmeticFenceEXT = 6145,
OpSubgroupBlockPrefetchINTEL = 6221,
OpSubgroup2DBlockLoadINTEL = 6231,
OpSubgroup2DBlockLoadTransformINTEL = 6232,
OpSubgroup2DBlockLoadTransposeINTEL = 6233,
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
@ -2597,9 +2781,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break;
case OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break;
case OpReadClockKHR: *hasResult = true; *hasResultType = true; break;
case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case OpAllocateNodePayloadsAMDX: *hasResult = true; *hasResultType = true; break;
case OpEnqueueNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case OpTypeNodePayloadArrayAMDX: *hasResult = true; *hasResultType = false; break;
case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
case OpNodePayloadArrayLengthAMDX: *hasResult = true; *hasResultType = true; break;
case OpIsNodePayloadValidAMDX: *hasResult = true; *hasResultType = true; break;
case OpConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
case OpSpecConstantStringAMDX: *hasResult = true; *hasResultType = false; break;
case OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
@ -2636,12 +2825,20 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpReorderThreadWithHintNV: *hasResult = false; *hasResultType = false; break;
case OpTypeHitObjectNV: *hasResult = true; *hasResultType = false; break;
case OpImageSampleFootprintNV: *hasResult = true; *hasResultType = true; break;
case OpTypeCooperativeVectorNV: *hasResult = true; *hasResultType = false; break;
case OpCooperativeVectorMatrixMulNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeVectorOuterProductAccumulateNV: *hasResult = false; *hasResultType = false; break;
case OpCooperativeVectorReduceSumAccumulateNV: *hasResult = false; *hasResultType = false; break;
case OpCooperativeVectorMatrixMulAddNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeMatrixConvertNV: *hasResult = true; *hasResultType = true; break;
case OpEmitMeshTasksEXT: *hasResult = false; *hasResultType = false; break;
case OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break;
case OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break;
case OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break;
case OpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break;
case OpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeVectorLoadNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeVectorStoreNV: *hasResult = false; *hasResultType = false; break;
case OpReportIntersectionKHR: *hasResult = true; *hasResultType = true; break;
case OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break;
case OpTerminateRayNV: *hasResult = false; *hasResultType = false; break;
@ -2651,6 +2848,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpRayQueryGetIntersectionTriangleVertexPositionsKHR: *hasResult = true; *hasResultType = true; break;
case OpTypeAccelerationStructureKHR: *hasResult = true; *hasResultType = false; break;
case OpExecuteCallableNV: *hasResult = false; *hasResultType = false; break;
case OpRayQueryGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectGetClusterIdNV: *hasResult = true; *hasResultType = true; break;
case OpTypeCooperativeMatrixNV: *hasResult = true; *hasResultType = false; break;
case OpCooperativeMatrixLoadNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeMatrixStoreNV: *hasResult = false; *hasResultType = false; break;
@ -2658,8 +2857,25 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
case OpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case OpCooperativeMatrixReduceNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeMatrixLoadTensorNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeMatrixStoreTensorNV: *hasResult = false; *hasResultType = false; break;
case OpCooperativeMatrixPerElementOpNV: *hasResult = true; *hasResultType = true; break;
case OpTypeTensorLayoutNV: *hasResult = true; *hasResultType = false; break;
case OpTypeTensorViewNV: *hasResult = true; *hasResultType = false; break;
case OpCreateTensorLayoutNV: *hasResult = true; *hasResultType = true; break;
case OpTensorLayoutSetDimensionNV: *hasResult = true; *hasResultType = true; break;
case OpTensorLayoutSetStrideNV: *hasResult = true; *hasResultType = true; break;
case OpTensorLayoutSliceNV: *hasResult = true; *hasResultType = true; break;
case OpTensorLayoutSetClampValueNV: *hasResult = true; *hasResultType = true; break;
case OpCreateTensorViewNV: *hasResult = true; *hasResultType = true; break;
case OpTensorViewSetDimensionNV: *hasResult = true; *hasResultType = true; break;
case OpTensorViewSetStrideNV: *hasResult = true; *hasResultType = true; break;
case OpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
case OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
case OpTensorViewSetClipNV: *hasResult = true; *hasResultType = true; break;
case OpTensorLayoutSetBlockSizeNV: *hasResult = true; *hasResultType = true; break;
case OpCooperativeMatrixTransposeNV: *hasResult = true; *hasResultType = true; break;
case OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
case OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
case OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
@ -2668,6 +2884,19 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryGetIntersectionSpherePositionNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryGetIntersectionSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryGetIntersectionLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryGetIntersectionLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryGetIntersectionLSSHitValueNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectGetSpherePositionNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectGetSphereRadiusNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectGetLSSPositionsNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectGetLSSRadiiNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
case OpHitObjectIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryIsSphereHitNV: *hasResult = true; *hasResultType = true; break;
case OpRayQueryIsLSSHitNV: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@ -2694,7 +2923,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case OpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case OpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
case OpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
case OpAsmTargetINTEL: *hasResult = true; *hasResultType = false; break;
case OpAsmINTEL: *hasResult = true; *hasResultType = true; break;
case OpAsmCallINTEL: *hasResult = true; *hasResultType = true; break;
case OpAtomicFMinEXT: *hasResult = true; *hasResultType = true; break;
@ -2912,7 +3141,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break;
case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case OpArithmeticFenceEXT: *hasResult = true; *hasResultType = true; break;
case OpSubgroupBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockLoadINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockLoadTransformINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockLoadTransposeINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
@ -2940,6 +3176,7 @@ inline const char* SourceLanguageToString(SourceLanguage value) {
case SourceLanguageWGSL: return "WGSL";
case SourceLanguageSlang: return "Slang";
case SourceLanguageZig: return "Zig";
case SourceLanguageRust: return "Rust";
default: return "Unknown";
}
}
@ -3040,6 +3277,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) {
case ExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD";
case ExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
case ExecutionModeCoalescingAMDX: return "CoalescingAMDX";
case ExecutionModeIsApiEntryAMDX: return "IsApiEntryAMDX";
case ExecutionModeMaxNodeRecursionAMDX: return "MaxNodeRecursionAMDX";
case ExecutionModeStaticNumWorkgroupsAMDX: return "StaticNumWorkgroupsAMDX";
case ExecutionModeShaderIndexAMDX: return "ShaderIndexAMDX";
@ -3052,6 +3290,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) {
case ExecutionModeStencilRefLessBackAMD: return "StencilRefLessBackAMD";
case ExecutionModeQuadDerivativesKHR: return "QuadDerivativesKHR";
case ExecutionModeRequireFullQuadsKHR: return "RequireFullQuadsKHR";
case ExecutionModeSharesInputWithAMDX: return "SharesInputWithAMDX";
case ExecutionModeOutputLinesEXT: return "OutputLinesEXT";
case ExecutionModeOutputPrimitivesEXT: return "OutputPrimitivesEXT";
case ExecutionModeDerivativeGroupQuadsKHR: return "DerivativeGroupQuadsKHR";
@ -3102,7 +3341,6 @@ inline const char* StorageClassToString(StorageClass value) {
case StorageClassStorageBuffer: return "StorageBuffer";
case StorageClassTileImageEXT: return "TileImageEXT";
case StorageClassNodePayloadAMDX: return "NodePayloadAMDX";
case StorageClassNodeOutputPayloadAMDX: return "NodeOutputPayloadAMDX";
case StorageClassCallableDataKHR: return "CallableDataKHR";
case StorageClassIncomingCallableDataKHR: return "IncomingCallableDataKHR";
case StorageClassRayPayloadKHR: return "RayPayloadKHR";
@ -3354,6 +3592,10 @@ inline const char* DecorationToString(Decoration value) {
case DecorationNodeMaxPayloadsAMDX: return "NodeMaxPayloadsAMDX";
case DecorationTrackFinishWritingAMDX: return "TrackFinishWritingAMDX";
case DecorationPayloadNodeNameAMDX: return "PayloadNodeNameAMDX";
case DecorationPayloadNodeBaseIndexAMDX: return "PayloadNodeBaseIndexAMDX";
case DecorationPayloadNodeSparseArrayAMDX: return "PayloadNodeSparseArrayAMDX";
case DecorationPayloadNodeArraySizeAMDX: return "PayloadNodeArraySizeAMDX";
case DecorationPayloadDispatchIndirectAMDX: return "PayloadDispatchIndirectAMDX";
case DecorationOverrideCoverageNV: return "OverrideCoverageNV";
case DecorationPassthroughNV: return "PassthroughNV";
case DecorationViewportRelativeNV: return "ViewportRelativeNV";
@ -3507,7 +3749,7 @@ inline const char* BuiltInToString(BuiltIn value) {
case BuiltInBaryCoordSmoothSampleAMD: return "BaryCoordSmoothSampleAMD";
case BuiltInBaryCoordPullModelAMD: return "BaryCoordPullModelAMD";
case BuiltInFragStencilRefEXT: return "FragStencilRefEXT";
case BuiltInCoalescedInputCountAMDX: return "CoalescedInputCountAMDX";
case BuiltInRemainingRecursionLevelsAMDX: return "RemainingRecursionLevelsAMDX";
case BuiltInShaderIndexAMDX: return "ShaderIndexAMDX";
case BuiltInViewportMaskNV: return "ViewportMaskNV";
case BuiltInSecondaryPositionNV: return "SecondaryPositionNV";
@ -3550,12 +3792,19 @@ inline const char* BuiltInToString(BuiltIn value) {
case BuiltInHitMicroTriangleVertexBarycentricsNV: return "HitMicroTriangleVertexBarycentricsNV";
case BuiltInIncomingRayFlagsKHR: return "IncomingRayFlagsKHR";
case BuiltInRayGeometryIndexKHR: return "RayGeometryIndexKHR";
case BuiltInHitIsSphereNV: return "HitIsSphereNV";
case BuiltInHitIsLSSNV: return "HitIsLSSNV";
case BuiltInHitSpherePositionNV: return "HitSpherePositionNV";
case BuiltInWarpsPerSMNV: return "WarpsPerSMNV";
case BuiltInSMCountNV: return "SMCountNV";
case BuiltInWarpIDNV: return "WarpIDNV";
case BuiltInSMIDNV: return "SMIDNV";
case BuiltInHitLSSPositionsNV: return "HitLSSPositionsNV";
case BuiltInHitKindFrontFacingMicroTriangleNV: return "HitKindFrontFacingMicroTriangleNV";
case BuiltInHitKindBackFacingMicroTriangleNV: return "HitKindBackFacingMicroTriangleNV";
case BuiltInHitSphereRadiusNV: return "HitSphereRadiusNV";
case BuiltInHitLSSRadiiNV: return "HitLSSRadiiNV";
case BuiltInClusterIDNV: return "ClusterIDNV";
case BuiltInCullMaskKHR: return "CullMaskKHR";
default: return "Unknown";
}
@ -3761,9 +4010,20 @@ inline const char* CapabilityToString(Capability value) {
case CapabilityShaderInvocationReorderNV: return "ShaderInvocationReorderNV";
case CapabilityBindlessTextureNV: return "BindlessTextureNV";
case CapabilityRayQueryPositionFetchKHR: return "RayQueryPositionFetchKHR";
case CapabilityCooperativeVectorNV: return "CooperativeVectorNV";
case CapabilityAtomicFloat16VectorNV: return "AtomicFloat16VectorNV";
case CapabilityRayTracingDisplacementMicromapNV: return "RayTracingDisplacementMicromapNV";
case CapabilityRawAccessChainsNV: return "RawAccessChainsNV";
case CapabilityRayTracingSpheresGeometryNV: return "RayTracingSpheresGeometryNV";
case CapabilityRayTracingLinearSweptSpheresGeometryNV: return "RayTracingLinearSweptSpheresGeometryNV";
case CapabilityCooperativeMatrixReductionsNV: return "CooperativeMatrixReductionsNV";
case CapabilityCooperativeMatrixConversionsNV: return "CooperativeMatrixConversionsNV";
case CapabilityCooperativeMatrixPerElementOperationsNV: return "CooperativeMatrixPerElementOperationsNV";
case CapabilityCooperativeMatrixTensorAddressingNV: return "CooperativeMatrixTensorAddressingNV";
case CapabilityCooperativeMatrixBlockLoadsNV: return "CooperativeMatrixBlockLoadsNV";
case CapabilityCooperativeVectorTrainingNV: return "CooperativeVectorTrainingNV";
case CapabilityRayTracingClusterAccelerationStructureNV: return "RayTracingClusterAccelerationStructureNV";
case CapabilityTensorAddressingNV: return "TensorAddressingNV";
case CapabilitySubgroupShuffleINTEL: return "SubgroupShuffleINTEL";
case CapabilitySubgroupBufferBlockIOINTEL: return "SubgroupBufferBlockIOINTEL";
case CapabilitySubgroupImageBlockIOINTEL: return "SubgroupImageBlockIOINTEL";
@ -3819,11 +4079,12 @@ inline const char* CapabilityToString(Capability value) {
case CapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
case CapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
case CapabilityLongCompositesINTEL: return "LongCompositesINTEL";
case CapabilityOptNoneINTEL: return "OptNoneINTEL";
case CapabilityOptNoneEXT: return "OptNoneEXT";
case CapabilityAtomicFloat16AddEXT: return "AtomicFloat16AddEXT";
case CapabilityDebugInfoModuleINTEL: return "DebugInfoModuleINTEL";
case CapabilityBFloat16ConversionINTEL: return "BFloat16ConversionINTEL";
case CapabilitySplitBarrierINTEL: return "SplitBarrierINTEL";
case CapabilityArithmeticFenceEXT: return "ArithmeticFenceEXT";
case CapabilityFPGAClusterAttributesV2INTEL: return "FPGAClusterAttributesV2INTEL";
case CapabilityFPGAKernelAttributesv2INTEL: return "FPGAKernelAttributesv2INTEL";
case CapabilityFPMaxErrorINTEL: return "FPMaxErrorINTEL";
@ -3832,6 +4093,10 @@ inline const char* CapabilityToString(Capability value) {
case CapabilityGlobalVariableHostAccessINTEL: return "GlobalVariableHostAccessINTEL";
case CapabilityGlobalVariableFPGADecorationsINTEL: return "GlobalVariableFPGADecorationsINTEL";
case CapabilitySubgroupBufferPrefetchINTEL: return "SubgroupBufferPrefetchINTEL";
case CapabilitySubgroup2DBlockIOINTEL: return "Subgroup2DBlockIOINTEL";
case CapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
case CapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
case CapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
case CapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
case CapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
case CapabilityCacheControlsINTEL: return "CacheControlsINTEL";
@ -3931,6 +4196,17 @@ inline const char* CooperativeMatrixUseToString(CooperativeMatrixUse value) {
}
}
inline const char* TensorClampModeToString(TensorClampMode value) {
switch (value) {
case TensorClampModeUndefined: return "Undefined";
case TensorClampModeConstant: return "Constant";
case TensorClampModeClampToEdge: return "ClampToEdge";
case TensorClampModeRepeat: return "Repeat";
case TensorClampModeRepeatMirrored: return "RepeatMirrored";
default: return "Unknown";
}
}
inline const char* InitializationModeQualifierToString(InitializationModeQualifier value) {
switch (value) {
case InitializationModeQualifierInitOnDeviceReprogramINTEL: return "InitOnDeviceReprogramINTEL";
@ -3983,6 +4259,37 @@ inline const char* FPEncodingToString(FPEncoding value) {
}
}
inline const char* CooperativeVectorMatrixLayoutToString(CooperativeVectorMatrixLayout value) {
switch (value) {
case CooperativeVectorMatrixLayoutRowMajorNV: return "RowMajorNV";
case CooperativeVectorMatrixLayoutColumnMajorNV: return "ColumnMajorNV";
case CooperativeVectorMatrixLayoutInferencingOptimalNV: return "InferencingOptimalNV";
case CooperativeVectorMatrixLayoutTrainingOptimalNV: return "TrainingOptimalNV";
default: return "Unknown";
}
}
inline const char* ComponentTypeToString(ComponentType value) {
switch (value) {
case ComponentTypeFloat16NV: return "Float16NV";
case ComponentTypeFloat32NV: return "Float32NV";
case ComponentTypeFloat64NV: return "Float64NV";
case ComponentTypeSignedInt8NV: return "SignedInt8NV";
case ComponentTypeSignedInt16NV: return "SignedInt16NV";
case ComponentTypeSignedInt32NV: return "SignedInt32NV";
case ComponentTypeSignedInt64NV: return "SignedInt64NV";
case ComponentTypeUnsignedInt8NV: return "UnsignedInt8NV";
case ComponentTypeUnsignedInt16NV: return "UnsignedInt16NV";
case ComponentTypeUnsignedInt32NV: return "UnsignedInt32NV";
case ComponentTypeUnsignedInt64NV: return "UnsignedInt64NV";
case ComponentTypeSignedInt8PackedNV: return "SignedInt8PackedNV";
case ComponentTypeUnsignedInt8PackedNV: return "UnsignedInt8PackedNV";
case ComponentTypeFloatE4M3NV: return "FloatE4M3NV";
case ComponentTypeFloatE5M2NV: return "FloatE5M2NV";
default: return "Unknown";
}
}
inline const char* OpToString(Op value) {
switch (value) {
case OpNop: return "OpNop";
@ -4394,9 +4701,14 @@ inline const char* OpToString(Op value) {
case OpFragmentMaskFetchAMD: return "OpFragmentMaskFetchAMD";
case OpFragmentFetchAMD: return "OpFragmentFetchAMD";
case OpReadClockKHR: return "OpReadClockKHR";
case OpFinalizeNodePayloadsAMDX: return "OpFinalizeNodePayloadsAMDX";
case OpAllocateNodePayloadsAMDX: return "OpAllocateNodePayloadsAMDX";
case OpEnqueueNodePayloadsAMDX: return "OpEnqueueNodePayloadsAMDX";
case OpTypeNodePayloadArrayAMDX: return "OpTypeNodePayloadArrayAMDX";
case OpFinishWritingNodePayloadAMDX: return "OpFinishWritingNodePayloadAMDX";
case OpInitializeNodePayloadsAMDX: return "OpInitializeNodePayloadsAMDX";
case OpNodePayloadArrayLengthAMDX: return "OpNodePayloadArrayLengthAMDX";
case OpIsNodePayloadValidAMDX: return "OpIsNodePayloadValidAMDX";
case OpConstantStringAMDX: return "OpConstantStringAMDX";
case OpSpecConstantStringAMDX: return "OpSpecConstantStringAMDX";
case OpGroupNonUniformQuadAllKHR: return "OpGroupNonUniformQuadAllKHR";
case OpGroupNonUniformQuadAnyKHR: return "OpGroupNonUniformQuadAnyKHR";
case OpHitObjectRecordHitMotionNV: return "OpHitObjectRecordHitMotionNV";
@ -4433,12 +4745,20 @@ inline const char* OpToString(Op value) {
case OpReorderThreadWithHintNV: return "OpReorderThreadWithHintNV";
case OpTypeHitObjectNV: return "OpTypeHitObjectNV";
case OpImageSampleFootprintNV: return "OpImageSampleFootprintNV";
case OpTypeCooperativeVectorNV: return "OpTypeCooperativeVectorNV";
case OpCooperativeVectorMatrixMulNV: return "OpCooperativeVectorMatrixMulNV";
case OpCooperativeVectorOuterProductAccumulateNV: return "OpCooperativeVectorOuterProductAccumulateNV";
case OpCooperativeVectorReduceSumAccumulateNV: return "OpCooperativeVectorReduceSumAccumulateNV";
case OpCooperativeVectorMatrixMulAddNV: return "OpCooperativeVectorMatrixMulAddNV";
case OpCooperativeMatrixConvertNV: return "OpCooperativeMatrixConvertNV";
case OpEmitMeshTasksEXT: return "OpEmitMeshTasksEXT";
case OpSetMeshOutputsEXT: return "OpSetMeshOutputsEXT";
case OpGroupNonUniformPartitionNV: return "OpGroupNonUniformPartitionNV";
case OpWritePackedPrimitiveIndices4x8NV: return "OpWritePackedPrimitiveIndices4x8NV";
case OpFetchMicroTriangleVertexPositionNV: return "OpFetchMicroTriangleVertexPositionNV";
case OpFetchMicroTriangleVertexBarycentricNV: return "OpFetchMicroTriangleVertexBarycentricNV";
case OpCooperativeVectorLoadNV: return "OpCooperativeVectorLoadNV";
case OpCooperativeVectorStoreNV: return "OpCooperativeVectorStoreNV";
case OpReportIntersectionKHR: return "OpReportIntersectionKHR";
case OpIgnoreIntersectionNV: return "OpIgnoreIntersectionNV";
case OpTerminateRayNV: return "OpTerminateRayNV";
@ -4448,6 +4768,8 @@ inline const char* OpToString(Op value) {
case OpRayQueryGetIntersectionTriangleVertexPositionsKHR: return "OpRayQueryGetIntersectionTriangleVertexPositionsKHR";
case OpTypeAccelerationStructureKHR: return "OpTypeAccelerationStructureKHR";
case OpExecuteCallableNV: return "OpExecuteCallableNV";
case OpRayQueryGetClusterIdNV: return "OpRayQueryGetClusterIdNV";
case OpHitObjectGetClusterIdNV: return "OpHitObjectGetClusterIdNV";
case OpTypeCooperativeMatrixNV: return "OpTypeCooperativeMatrixNV";
case OpCooperativeMatrixLoadNV: return "OpCooperativeMatrixLoadNV";
case OpCooperativeMatrixStoreNV: return "OpCooperativeMatrixStoreNV";
@ -4455,8 +4777,25 @@ inline const char* OpToString(Op value) {
case OpCooperativeMatrixLengthNV: return "OpCooperativeMatrixLengthNV";
case OpBeginInvocationInterlockEXT: return "OpBeginInvocationInterlockEXT";
case OpEndInvocationInterlockEXT: return "OpEndInvocationInterlockEXT";
case OpCooperativeMatrixReduceNV: return "OpCooperativeMatrixReduceNV";
case OpCooperativeMatrixLoadTensorNV: return "OpCooperativeMatrixLoadTensorNV";
case OpCooperativeMatrixStoreTensorNV: return "OpCooperativeMatrixStoreTensorNV";
case OpCooperativeMatrixPerElementOpNV: return "OpCooperativeMatrixPerElementOpNV";
case OpTypeTensorLayoutNV: return "OpTypeTensorLayoutNV";
case OpTypeTensorViewNV: return "OpTypeTensorViewNV";
case OpCreateTensorLayoutNV: return "OpCreateTensorLayoutNV";
case OpTensorLayoutSetDimensionNV: return "OpTensorLayoutSetDimensionNV";
case OpTensorLayoutSetStrideNV: return "OpTensorLayoutSetStrideNV";
case OpTensorLayoutSliceNV: return "OpTensorLayoutSliceNV";
case OpTensorLayoutSetClampValueNV: return "OpTensorLayoutSetClampValueNV";
case OpCreateTensorViewNV: return "OpCreateTensorViewNV";
case OpTensorViewSetDimensionNV: return "OpTensorViewSetDimensionNV";
case OpTensorViewSetStrideNV: return "OpTensorViewSetStrideNV";
case OpDemoteToHelperInvocation: return "OpDemoteToHelperInvocation";
case OpIsHelperInvocationEXT: return "OpIsHelperInvocationEXT";
case OpTensorViewSetClipNV: return "OpTensorViewSetClipNV";
case OpTensorLayoutSetBlockSizeNV: return "OpTensorLayoutSetBlockSizeNV";
case OpCooperativeMatrixTransposeNV: return "OpCooperativeMatrixTransposeNV";
case OpConvertUToImageNV: return "OpConvertUToImageNV";
case OpConvertUToSamplerNV: return "OpConvertUToSamplerNV";
case OpConvertImageToUNV: return "OpConvertImageToUNV";
@ -4465,6 +4804,19 @@ inline const char* OpToString(Op value) {
case OpConvertSampledImageToUNV: return "OpConvertSampledImageToUNV";
case OpSamplerImageAddressingModeNV: return "OpSamplerImageAddressingModeNV";
case OpRawAccessChainNV: return "OpRawAccessChainNV";
case OpRayQueryGetIntersectionSpherePositionNV: return "OpRayQueryGetIntersectionSpherePositionNV";
case OpRayQueryGetIntersectionSphereRadiusNV: return "OpRayQueryGetIntersectionSphereRadiusNV";
case OpRayQueryGetIntersectionLSSPositionsNV: return "OpRayQueryGetIntersectionLSSPositionsNV";
case OpRayQueryGetIntersectionLSSRadiiNV: return "OpRayQueryGetIntersectionLSSRadiiNV";
case OpRayQueryGetIntersectionLSSHitValueNV: return "OpRayQueryGetIntersectionLSSHitValueNV";
case OpHitObjectGetSpherePositionNV: return "OpHitObjectGetSpherePositionNV";
case OpHitObjectGetSphereRadiusNV: return "OpHitObjectGetSphereRadiusNV";
case OpHitObjectGetLSSPositionsNV: return "OpHitObjectGetLSSPositionsNV";
case OpHitObjectGetLSSRadiiNV: return "OpHitObjectGetLSSRadiiNV";
case OpHitObjectIsSphereHitNV: return "OpHitObjectIsSphereHitNV";
case OpHitObjectIsLSSHitNV: return "OpHitObjectIsLSSHitNV";
case OpRayQueryIsSphereHitNV: return "OpRayQueryIsSphereHitNV";
case OpRayQueryIsLSSHitNV: return "OpRayQueryIsLSSHitNV";
case OpSubgroupShuffleINTEL: return "OpSubgroupShuffleINTEL";
case OpSubgroupShuffleDownINTEL: return "OpSubgroupShuffleDownINTEL";
case OpSubgroupShuffleUpINTEL: return "OpSubgroupShuffleUpINTEL";
@ -4709,7 +5061,14 @@ inline const char* OpToString(Op value) {
case OpConvertBF16ToFINTEL: return "OpConvertBF16ToFINTEL";
case OpControlBarrierArriveINTEL: return "OpControlBarrierArriveINTEL";
case OpControlBarrierWaitINTEL: return "OpControlBarrierWaitINTEL";
case OpArithmeticFenceEXT: return "OpArithmeticFenceEXT";
case OpSubgroupBlockPrefetchINTEL: return "OpSubgroupBlockPrefetchINTEL";
case OpSubgroup2DBlockLoadINTEL: return "OpSubgroup2DBlockLoadINTEL";
case OpSubgroup2DBlockLoadTransformINTEL: return "OpSubgroup2DBlockLoadTransformINTEL";
case OpSubgroup2DBlockLoadTransposeINTEL: return "OpSubgroup2DBlockLoadTransposeINTEL";
case OpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
case OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
case OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
case OpGroupIMulKHR: return "OpGroupIMulKHR";
case OpGroupFMulKHR: return "OpGroupFMulKHR";
case OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
@ -4772,6 +5131,18 @@ inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a,
inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
inline CooperativeMatrixReduceMask operator|(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) | unsigned(b)); }
inline CooperativeMatrixReduceMask operator&(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) & unsigned(b)); }
inline CooperativeMatrixReduceMask operator^(CooperativeMatrixReduceMask a, CooperativeMatrixReduceMask b) { return CooperativeMatrixReduceMask(unsigned(a) ^ unsigned(b)); }
inline CooperativeMatrixReduceMask operator~(CooperativeMatrixReduceMask a) { return CooperativeMatrixReduceMask(~unsigned(a)); }
inline TensorAddressingOperandsMask operator|(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) | unsigned(b)); }
inline TensorAddressingOperandsMask operator&(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) & unsigned(b)); }
inline TensorAddressingOperandsMask operator^(TensorAddressingOperandsMask a, TensorAddressingOperandsMask b) { return TensorAddressingOperandsMask(unsigned(a) ^ unsigned(b)); }
inline TensorAddressingOperandsMask operator~(TensorAddressingOperandsMask a) { return TensorAddressingOperandsMask(~unsigned(a)); }
inline MatrixMultiplyAccumulateOperandsMask operator|(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) | unsigned(b)); }
inline MatrixMultiplyAccumulateOperandsMask operator&(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) & unsigned(b)); }
inline MatrixMultiplyAccumulateOperandsMask operator^(MatrixMultiplyAccumulateOperandsMask a, MatrixMultiplyAccumulateOperandsMask b) { return MatrixMultiplyAccumulateOperandsMask(unsigned(a) ^ unsigned(b)); }
inline MatrixMultiplyAccumulateOperandsMask operator~(MatrixMultiplyAccumulateOperandsMask a) { return MatrixMultiplyAccumulateOperandsMask(~unsigned(a)); }
inline RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
inline RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
inline RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }

3517
include/vulkan/spirv-headers/spirv.hpp11
View file

File diff suppressed because it is too large Load diff

181
include/vulkan/spirv-headers/spirv.json
View file

@ -20,7 +20,7 @@
"",
"MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS",
"STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND",
"HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ ",
"HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/",
"",
"THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS",
"OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,",
@ -80,7 +80,8 @@
"NZSL": 9,
"WGSL": 10,
"Slang": 11,
"Zig": 12
"Zig": 12,
"Rust": 13
}
},
{
@ -193,6 +194,7 @@
"EarlyAndLateFragmentTestsAMD": 5017,
"StencilRefReplacingEXT": 5027,
"CoalescingAMDX": 5069,
"IsApiEntryAMDX": 5070,
"MaxNodeRecursionAMDX": 5071,
"StaticNumWorkgroupsAMDX": 5072,
"ShaderIndexAMDX": 5073,
@ -205,6 +207,7 @@
"StencilRefLessBackAMD": 5084,
"QuadDerivativesKHR": 5088,
"RequireFullQuadsKHR": 5089,
"SharesInputWithAMDX": 5102,
"OutputLinesEXT": 5269,
"OutputLinesNV": 5269,
"OutputPrimitivesEXT": 5270,
@ -261,7 +264,6 @@
"StorageBuffer": 12,
"TileImageEXT": 4172,
"NodePayloadAMDX": 5068,
"NodeOutputPayloadAMDX": 5076,
"CallableDataKHR": 5328,
"CallableDataNV": 5328,
"IncomingCallableDataKHR": 5329,
@ -575,6 +577,10 @@
"NodeMaxPayloadsAMDX": 5020,
"TrackFinishWritingAMDX": 5078,
"PayloadNodeNameAMDX": 5091,
"PayloadNodeBaseIndexAMDX": 5098,
"PayloadNodeSparseArrayAMDX": 5099,
"PayloadNodeArraySizeAMDX": 5100,
"PayloadDispatchIndirectAMDX": 5105,
"OverrideCoverageNV": 5248,
"PassthroughNV": 5250,
"ViewportRelativeNV": 5252,
@ -741,7 +747,7 @@
"BaryCoordSmoothSampleAMD": 4997,
"BaryCoordPullModelAMD": 4998,
"FragStencilRefEXT": 5014,
"CoalescedInputCountAMDX": 5021,
"RemainingRecursionLevelsAMDX": 5021,
"ShaderIndexAMDX": 5073,
"ViewportMaskNV": 5253,
"SecondaryPositionNV": 5257,
@ -801,12 +807,19 @@
"IncomingRayFlagsKHR": 5351,
"IncomingRayFlagsNV": 5351,
"RayGeometryIndexKHR": 5352,
"HitIsSphereNV": 5359,
"HitIsLSSNV": 5360,
"HitSpherePositionNV": 5361,
"WarpsPerSMNV": 5374,
"SMCountNV": 5375,
"WarpIDNV": 5376,
"SMIDNV": 5377,
"HitLSSPositionsNV": 5396,
"HitKindFrontFacingMicroTriangleNV": 5405,
"HitKindBackFacingMicroTriangleNV": 5406,
"HitSphereRadiusNV": 5420,
"HitLSSRadiiNV": 5421,
"ClusterIDNV": 5436,
"CullMaskKHR": 6021
}
},
@ -854,6 +867,7 @@
"DontInline": 1,
"Pure": 2,
"Const": 3,
"OptNoneEXT": 16,
"OptNoneINTEL": 16
}
},
@ -1137,9 +1151,20 @@
"ShaderInvocationReorderNV": 5383,
"BindlessTextureNV": 5390,
"RayQueryPositionFetchKHR": 5391,
"CooperativeVectorNV": 5394,
"AtomicFloat16VectorNV": 5404,
"RayTracingDisplacementMicromapNV": 5409,
"RawAccessChainsNV": 5414,
"RayTracingSpheresGeometryNV": 5418,
"RayTracingLinearSweptSpheresGeometryNV": 5419,
"CooperativeMatrixReductionsNV": 5430,
"CooperativeMatrixConversionsNV": 5431,
"CooperativeMatrixPerElementOperationsNV": 5432,
"CooperativeMatrixTensorAddressingNV": 5433,
"CooperativeMatrixBlockLoadsNV": 5434,
"CooperativeVectorTrainingNV": 5435,
"RayTracingClusterAccelerationStructureNV": 5437,
"TensorAddressingNV": 5439,
"SubgroupShuffleINTEL": 5568,
"SubgroupBufferBlockIOINTEL": 5569,
"SubgroupImageBlockIOINTEL": 5570,
@ -1199,11 +1224,13 @@
"AtomicFloat32AddEXT": 6033,
"AtomicFloat64AddEXT": 6034,
"LongCompositesINTEL": 6089,
"OptNoneEXT": 6094,
"OptNoneINTEL": 6094,
"AtomicFloat16AddEXT": 6095,
"DebugInfoModuleINTEL": 6114,
"BFloat16ConversionINTEL": 6115,
"SplitBarrierINTEL": 6141,
"ArithmeticFenceEXT": 6144,
"FPGAClusterAttributesV2INTEL": 6150,
"FPGAKernelAttributesv2INTEL": 6161,
"FPMaxErrorINTEL": 6169,
@ -1212,6 +1239,10 @@
"GlobalVariableHostAccessINTEL": 6187,
"GlobalVariableFPGADecorationsINTEL": 6189,
"SubgroupBufferPrefetchINTEL": 6220,
"Subgroup2DBlockIOINTEL": 6228,
"Subgroup2DBlockTransformINTEL": 6229,
"Subgroup2DBlockTransposeINTEL": 6230,
"SubgroupMatrixMultiplyAccumulateINTEL": 6236,
"GroupUniformArithmeticKHR": 6400,
"MaskedGatherScatterINTEL": 6427,
"CacheControlsINTEL": 6441,
@ -1231,6 +1262,7 @@
"CullFrontFacingTrianglesKHR": 5,
"CullOpaqueKHR": 6,
"CullNoOpaqueKHR": 7,
"SkipBuiltinPrimitivesNV": 8,
"SkipTrianglesKHR": 8,
"SkipAABBsKHR": 9,
"ForceOpacityMicromap2StateEXT": 10
@ -1361,6 +1393,37 @@
"MatrixAccumulatorKHR": 2
}
},
{
"Name": "CooperativeMatrixReduce",
"Type": "Bit",
"Values":
{
"Row": 0,
"Column": 1,
"CooperativeMatrixReduce2x2": 2
}
},
{
"Name": "TensorClampMode",
"Type": "Value",
"Values":
{
"Undefined": 0,
"Constant": 1,
"ClampToEdge": 2,
"Repeat": 3,
"RepeatMirrored": 4
}
},
{
"Name": "TensorAddressingOperands",
"Type": "Bit",
"Values":
{
"TensorView": 0,
"DecodeFunc": 1
}
},
{
"Name": "InitializationModeQualifier",
"Type": "Value",
@ -1412,6 +1475,27 @@
"AutoINTEL": 0
}
},
{
"Name": "MatrixMultiplyAccumulateOperands",
"Type": "Bit",
"Values":
{
"MatrixASignedComponentsINTEL": 0,
"MatrixBSignedComponentsINTEL": 1,
"MatrixCBFloat16INTEL": 2,
"MatrixResultBFloat16INTEL": 3,
"MatrixAPackedInt8INTEL": 4,
"MatrixBPackedInt8INTEL": 5,
"MatrixAPackedInt4INTEL": 6,
"MatrixBPackedInt4INTEL": 7,
"MatrixATF32INTEL": 8,
"MatrixBTF32INTEL": 9,
"MatrixAPackedFloat16INTEL": 10,
"MatrixBPackedFloat16INTEL": 11,
"MatrixAPackedBFloat16INTEL": 12,
"MatrixBPackedBFloat16INTEL": 13
}
},
{
"Name": "RawAccessChainOperands",
"Type": "Bit",
@ -1428,6 +1512,39 @@
{
}
},
{
"Name": "CooperativeVectorMatrixLayout",
"Type": "Value",
"Values":
{
"RowMajorNV": 0,
"ColumnMajorNV": 1,
"InferencingOptimalNV": 2,
"TrainingOptimalNV": 3
}
},
{
"Name": "ComponentType",
"Type": "Value",
"Values":
{
"Float16NV": 0,
"Float32NV": 1,
"Float64NV": 2,
"SignedInt8NV": 3,
"SignedInt16NV": 4,
"SignedInt32NV": 5,
"SignedInt64NV": 6,
"UnsignedInt8NV": 7,
"UnsignedInt16NV": 8,
"UnsignedInt32NV": 9,
"UnsignedInt64NV": 10,
"SignedInt8PackedNV": 1000491000,
"UnsignedInt8PackedNV": 1000491001,
"FloatE4M3NV": 1000491002,
"FloatE5M2NV": 1000491003
}
},
{
"Name": "Op",
"Type": "Value",
@ -1848,9 +1965,14 @@
"OpFragmentMaskFetchAMD": 5011,
"OpFragmentFetchAMD": 5012,
"OpReadClockKHR": 5056,
"OpFinalizeNodePayloadsAMDX": 5075,
"OpAllocateNodePayloadsAMDX": 5074,
"OpEnqueueNodePayloadsAMDX": 5075,
"OpTypeNodePayloadArrayAMDX": 5076,
"OpFinishWritingNodePayloadAMDX": 5078,
"OpInitializeNodePayloadsAMDX": 5090,
"OpNodePayloadArrayLengthAMDX": 5090,
"OpIsNodePayloadValidAMDX": 5101,
"OpConstantStringAMDX": 5103,
"OpSpecConstantStringAMDX": 5104,
"OpGroupNonUniformQuadAllKHR": 5110,
"OpGroupNonUniformQuadAnyKHR": 5111,
"OpHitObjectRecordHitMotionNV": 5249,
@ -1887,12 +2009,20 @@
"OpReorderThreadWithHintNV": 5280,
"OpTypeHitObjectNV": 5281,
"OpImageSampleFootprintNV": 5283,
"OpTypeCooperativeVectorNV": 5288,
"OpCooperativeVectorMatrixMulNV": 5289,
"OpCooperativeVectorOuterProductAccumulateNV": 5290,
"OpCooperativeVectorReduceSumAccumulateNV": 5291,
"OpCooperativeVectorMatrixMulAddNV": 5292,
"OpCooperativeMatrixConvertNV": 5293,
"OpEmitMeshTasksEXT": 5294,
"OpSetMeshOutputsEXT": 5295,
"OpGroupNonUniformPartitionNV": 5296,
"OpWritePackedPrimitiveIndices4x8NV": 5299,
"OpFetchMicroTriangleVertexPositionNV": 5300,
"OpFetchMicroTriangleVertexBarycentricNV": 5301,
"OpCooperativeVectorLoadNV": 5302,
"OpCooperativeVectorStoreNV": 5303,
"OpReportIntersectionKHR": 5334,
"OpReportIntersectionNV": 5334,
"OpIgnoreIntersectionNV": 5335,
@ -1904,6 +2034,8 @@
"OpTypeAccelerationStructureKHR": 5341,
"OpTypeAccelerationStructureNV": 5341,
"OpExecuteCallableNV": 5344,
"OpRayQueryGetClusterIdNV": 5345,
"OpHitObjectGetClusterIdNV": 5346,
"OpTypeCooperativeMatrixNV": 5358,
"OpCooperativeMatrixLoadNV": 5359,
"OpCooperativeMatrixStoreNV": 5360,
@ -1911,9 +2043,26 @@
"OpCooperativeMatrixLengthNV": 5362,
"OpBeginInvocationInterlockEXT": 5364,
"OpEndInvocationInterlockEXT": 5365,
"OpCooperativeMatrixReduceNV": 5366,
"OpCooperativeMatrixLoadTensorNV": 5367,
"OpCooperativeMatrixStoreTensorNV": 5368,
"OpCooperativeMatrixPerElementOpNV": 5369,
"OpTypeTensorLayoutNV": 5370,
"OpTypeTensorViewNV": 5371,
"OpCreateTensorLayoutNV": 5372,
"OpTensorLayoutSetDimensionNV": 5373,
"OpTensorLayoutSetStrideNV": 5374,
"OpTensorLayoutSliceNV": 5375,
"OpTensorLayoutSetClampValueNV": 5376,
"OpCreateTensorViewNV": 5377,
"OpTensorViewSetDimensionNV": 5378,
"OpTensorViewSetStrideNV": 5379,
"OpDemoteToHelperInvocation": 5380,
"OpDemoteToHelperInvocationEXT": 5380,
"OpIsHelperInvocationEXT": 5381,
"OpTensorViewSetClipNV": 5382,
"OpTensorLayoutSetBlockSizeNV": 5384,
"OpCooperativeMatrixTransposeNV": 5390,
"OpConvertUToImageNV": 5391,
"OpConvertUToSamplerNV": 5392,
"OpConvertImageToUNV": 5393,
@ -1922,6 +2071,19 @@
"OpConvertSampledImageToUNV": 5396,
"OpSamplerImageAddressingModeNV": 5397,
"OpRawAccessChainNV": 5398,
"OpRayQueryGetIntersectionSpherePositionNV": 5427,
"OpRayQueryGetIntersectionSphereRadiusNV": 5428,
"OpRayQueryGetIntersectionLSSPositionsNV": 5429,
"OpRayQueryGetIntersectionLSSRadiiNV": 5430,
"OpRayQueryGetIntersectionLSSHitValueNV": 5431,
"OpHitObjectGetSpherePositionNV": 5432,
"OpHitObjectGetSphereRadiusNV": 5433,
"OpHitObjectGetLSSPositionsNV": 5434,
"OpHitObjectGetLSSRadiiNV": 5435,
"OpHitObjectIsSphereHitNV": 5436,
"OpHitObjectIsLSSHitNV": 5437,
"OpRayQueryIsSphereHitNV": 5438,
"OpRayQueryIsLSSHitNV": 5439,
"OpSubgroupShuffleINTEL": 5571,
"OpSubgroupShuffleDownINTEL": 5572,
"OpSubgroupShuffleUpINTEL": 5573,
@ -2168,7 +2330,14 @@
"OpConvertBF16ToFINTEL": 6117,
"OpControlBarrierArriveINTEL": 6142,
"OpControlBarrierWaitINTEL": 6143,
"OpArithmeticFenceEXT": 6145,
"OpSubgroupBlockPrefetchINTEL": 6221,
"OpSubgroup2DBlockLoadINTEL": 6231,
"OpSubgroup2DBlockLoadTransformINTEL": 6232,
"OpSubgroup2DBlockLoadTransposeINTEL": 6233,
"OpSubgroup2DBlockPrefetchINTEL": 6234,
"OpSubgroup2DBlockStoreINTEL": 6235,
"OpSubgroupMatrixMultiplyAccumulateINTEL": 6237,
"OpGroupIMulKHR": 6401,
"OpGroupFMulKHR": 6402,
"OpGroupBitwiseAndKHR": 6403,

194
include/vulkan/spirv-headers/spirv.lua
View file

@ -12,7 +12,7 @@
--
-- MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
-- STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
-- HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
-- HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
--
-- THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
-- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -65,6 +65,7 @@ spv = {
WGSL = 10,
Slang = 11,
Zig = 12,
Rust = 13,
Max = 0x7fffffff,
},
@ -165,6 +166,7 @@ spv = {
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
CoalescingAMDX = 5069,
IsApiEntryAMDX = 5070,
MaxNodeRecursionAMDX = 5071,
StaticNumWorkgroupsAMDX = 5072,
ShaderIndexAMDX = 5073,
@ -177,6 +179,7 @@ spv = {
StencilRefLessBackAMD = 5084,
QuadDerivativesKHR = 5088,
RequireFullQuadsKHR = 5089,
SharesInputWithAMDX = 5102,
OutputLinesEXT = 5269,
OutputLinesNV = 5269,
OutputPrimitivesEXT = 5270,
@ -230,7 +233,6 @@ spv = {
StorageBuffer = 12,
TileImageEXT = 4172,
NodePayloadAMDX = 5068,
NodeOutputPayloadAMDX = 5076,
CallableDataKHR = 5328,
CallableDataNV = 5328,
IncomingCallableDataKHR = 5329,
@ -543,6 +545,10 @@ spv = {
NodeMaxPayloadsAMDX = 5020,
TrackFinishWritingAMDX = 5078,
PayloadNodeNameAMDX = 5091,
PayloadNodeBaseIndexAMDX = 5098,
PayloadNodeSparseArrayAMDX = 5099,
PayloadNodeArraySizeAMDX = 5100,
PayloadDispatchIndirectAMDX = 5105,
OverrideCoverageNV = 5248,
PassthroughNV = 5250,
ViewportRelativeNV = 5252,
@ -706,7 +712,7 @@ spv = {
BaryCoordSmoothSampleAMD = 4997,
BaryCoordPullModelAMD = 4998,
FragStencilRefEXT = 5014,
CoalescedInputCountAMDX = 5021,
RemainingRecursionLevelsAMDX = 5021,
ShaderIndexAMDX = 5073,
ViewportMaskNV = 5253,
SecondaryPositionNV = 5257,
@ -766,12 +772,19 @@ spv = {
IncomingRayFlagsKHR = 5351,
IncomingRayFlagsNV = 5351,
RayGeometryIndexKHR = 5352,
HitIsSphereNV = 5359,
HitIsLSSNV = 5360,
HitSpherePositionNV = 5361,
WarpsPerSMNV = 5374,
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
HitLSSPositionsNV = 5396,
HitKindFrontFacingMicroTriangleNV = 5405,
HitKindBackFacingMicroTriangleNV = 5406,
HitSphereRadiusNV = 5420,
HitLSSRadiiNV = 5421,
ClusterIDNV = 5436,
CullMaskKHR = 6021,
Max = 0x7fffffff,
},
@ -839,6 +852,7 @@ spv = {
DontInline = 1,
Pure = 2,
Const = 3,
OptNoneEXT = 16,
OptNoneINTEL = 16,
Max = 0x7fffffff,
},
@ -849,6 +863,7 @@ spv = {
DontInline = 0x00000002,
Pure = 0x00000004,
Const = 0x00000008,
OptNoneEXT = 0x00010000,
OptNoneINTEL = 0x00010000,
},
@ -1151,9 +1166,20 @@ spv = {
ShaderInvocationReorderNV = 5383,
BindlessTextureNV = 5390,
RayQueryPositionFetchKHR = 5391,
CooperativeVectorNV = 5394,
AtomicFloat16VectorNV = 5404,
RayTracingDisplacementMicromapNV = 5409,
RawAccessChainsNV = 5414,
RayTracingSpheresGeometryNV = 5418,
RayTracingLinearSweptSpheresGeometryNV = 5419,
CooperativeMatrixReductionsNV = 5430,
CooperativeMatrixConversionsNV = 5431,
CooperativeMatrixPerElementOperationsNV = 5432,
CooperativeMatrixTensorAddressingNV = 5433,
CooperativeMatrixBlockLoadsNV = 5434,
CooperativeVectorTrainingNV = 5435,
RayTracingClusterAccelerationStructureNV = 5437,
TensorAddressingNV = 5439,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1213,11 +1239,13 @@ spv = {
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
OptNoneEXT = 6094,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
ArithmeticFenceEXT = 6144,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
@ -1226,6 +1254,10 @@ spv = {
GlobalVariableHostAccessINTEL = 6187,
GlobalVariableFPGADecorationsINTEL = 6189,
SubgroupBufferPrefetchINTEL = 6220,
Subgroup2DBlockIOINTEL = 6228,
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
@ -1242,6 +1274,7 @@ spv = {
CullFrontFacingTrianglesKHR = 5,
CullOpaqueKHR = 6,
CullNoOpaqueKHR = 7,
SkipBuiltinPrimitivesNV = 8,
SkipTrianglesKHR = 8,
SkipAABBsKHR = 9,
ForceOpacityMicromap2StateEXT = 10,
@ -1258,6 +1291,7 @@ spv = {
CullFrontFacingTrianglesKHR = 0x00000020,
CullOpaqueKHR = 0x00000040,
CullNoOpaqueKHR = 0x00000080,
SkipBuiltinPrimitivesNV = 0x00000100,
SkipTrianglesKHR = 0x00000100,
SkipAABBsKHR = 0x00000200,
ForceOpacityMicromap2StateEXT = 0x00000400,
@ -1369,6 +1403,41 @@ spv = {
Max = 0x7fffffff,
},
CooperativeMatrixReduceShift = {
Row = 0,
Column = 1,
CooperativeMatrixReduce2x2 = 2,
Max = 0x7fffffff,
},
CooperativeMatrixReduceMask = {
MaskNone = 0,
Row = 0x00000001,
Column = 0x00000002,
CooperativeMatrixReduce2x2 = 0x00000004,
},
TensorClampMode = {
Undefined = 0,
Constant = 1,
ClampToEdge = 2,
Repeat = 3,
RepeatMirrored = 4,
Max = 0x7fffffff,
},
TensorAddressingOperandsShift = {
TensorView = 0,
DecodeFunc = 1,
Max = 0x7fffffff,
},
TensorAddressingOperandsMask = {
MaskNone = 0,
TensorView = 0x00000001,
DecodeFunc = 0x00000002,
},
InitializationModeQualifier = {
InitOnDeviceReprogramINTEL = 0,
InitOnDeviceResetINTEL = 1,
@ -1405,6 +1474,42 @@ spv = {
Max = 0x7fffffff,
},
MatrixMultiplyAccumulateOperandsShift = {
MatrixASignedComponentsINTEL = 0,
MatrixBSignedComponentsINTEL = 1,
MatrixCBFloat16INTEL = 2,
MatrixResultBFloat16INTEL = 3,
MatrixAPackedInt8INTEL = 4,
MatrixBPackedInt8INTEL = 5,
MatrixAPackedInt4INTEL = 6,
MatrixBPackedInt4INTEL = 7,
MatrixATF32INTEL = 8,
MatrixBTF32INTEL = 9,
MatrixAPackedFloat16INTEL = 10,
MatrixBPackedFloat16INTEL = 11,
MatrixAPackedBFloat16INTEL = 12,
MatrixBPackedBFloat16INTEL = 13,
Max = 0x7fffffff,
},
MatrixMultiplyAccumulateOperandsMask = {
MaskNone = 0,
MatrixASignedComponentsINTEL = 0x00000001,
MatrixBSignedComponentsINTEL = 0x00000002,
MatrixCBFloat16INTEL = 0x00000004,
MatrixResultBFloat16INTEL = 0x00000008,
MatrixAPackedInt8INTEL = 0x00000010,
MatrixBPackedInt8INTEL = 0x00000020,
MatrixAPackedInt4INTEL = 0x00000040,
MatrixBPackedInt4INTEL = 0x00000080,
MatrixATF32INTEL = 0x00000100,
MatrixBTF32INTEL = 0x00000200,
MatrixAPackedFloat16INTEL = 0x00000400,
MatrixBPackedFloat16INTEL = 0x00000800,
MatrixAPackedBFloat16INTEL = 0x00001000,
MatrixBPackedBFloat16INTEL = 0x00002000,
},
RawAccessChainOperandsShift = {
RobustnessPerComponentNV = 0,
RobustnessPerElementNV = 1,
@ -1421,6 +1526,33 @@ spv = {
Max = 0x7fffffff,
},
CooperativeVectorMatrixLayout = {
RowMajorNV = 0,
ColumnMajorNV = 1,
InferencingOptimalNV = 2,
TrainingOptimalNV = 3,
Max = 0x7fffffff,
},
ComponentType = {
Float16NV = 0,
Float32NV = 1,
Float64NV = 2,
SignedInt8NV = 3,
SignedInt16NV = 4,
SignedInt32NV = 5,
SignedInt64NV = 6,
UnsignedInt8NV = 7,
UnsignedInt16NV = 8,
UnsignedInt32NV = 9,
UnsignedInt64NV = 10,
SignedInt8PackedNV = 1000491000,
UnsignedInt8PackedNV = 1000491001,
FloatE4M3NV = 1000491002,
FloatE5M2NV = 1000491003,
Max = 0x7fffffff,
},
Op = {
OpNop = 0,
OpUndef = 1,
@ -1837,9 +1969,14 @@ spv = {
OpFragmentMaskFetchAMD = 5011,
OpFragmentFetchAMD = 5012,
OpReadClockKHR = 5056,
OpFinalizeNodePayloadsAMDX = 5075,
OpAllocateNodePayloadsAMDX = 5074,
OpEnqueueNodePayloadsAMDX = 5075,
OpTypeNodePayloadArrayAMDX = 5076,
OpFinishWritingNodePayloadAMDX = 5078,
OpInitializeNodePayloadsAMDX = 5090,
OpNodePayloadArrayLengthAMDX = 5090,
OpIsNodePayloadValidAMDX = 5101,
OpConstantStringAMDX = 5103,
OpSpecConstantStringAMDX = 5104,
OpGroupNonUniformQuadAllKHR = 5110,
OpGroupNonUniformQuadAnyKHR = 5111,
OpHitObjectRecordHitMotionNV = 5249,
@ -1876,12 +2013,20 @@ spv = {
OpReorderThreadWithHintNV = 5280,
OpTypeHitObjectNV = 5281,
OpImageSampleFootprintNV = 5283,
OpTypeCooperativeVectorNV = 5288,
OpCooperativeVectorMatrixMulNV = 5289,
OpCooperativeVectorOuterProductAccumulateNV = 5290,
OpCooperativeVectorReduceSumAccumulateNV = 5291,
OpCooperativeVectorMatrixMulAddNV = 5292,
OpCooperativeMatrixConvertNV = 5293,
OpEmitMeshTasksEXT = 5294,
OpSetMeshOutputsEXT = 5295,
OpGroupNonUniformPartitionNV = 5296,
OpWritePackedPrimitiveIndices4x8NV = 5299,
OpFetchMicroTriangleVertexPositionNV = 5300,
OpFetchMicroTriangleVertexBarycentricNV = 5301,
OpCooperativeVectorLoadNV = 5302,
OpCooperativeVectorStoreNV = 5303,
OpReportIntersectionKHR = 5334,
OpReportIntersectionNV = 5334,
OpIgnoreIntersectionNV = 5335,
@ -1893,6 +2038,8 @@ spv = {
OpTypeAccelerationStructureKHR = 5341,
OpTypeAccelerationStructureNV = 5341,
OpExecuteCallableNV = 5344,
OpRayQueryGetClusterIdNV = 5345,
OpHitObjectGetClusterIdNV = 5346,
OpTypeCooperativeMatrixNV = 5358,
OpCooperativeMatrixLoadNV = 5359,
OpCooperativeMatrixStoreNV = 5360,
@ -1900,9 +2047,26 @@ spv = {
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpCooperativeMatrixReduceNV = 5366,
OpCooperativeMatrixLoadTensorNV = 5367,
OpCooperativeMatrixStoreTensorNV = 5368,
OpCooperativeMatrixPerElementOpNV = 5369,
OpTypeTensorLayoutNV = 5370,
OpTypeTensorViewNV = 5371,
OpCreateTensorLayoutNV = 5372,
OpTensorLayoutSetDimensionNV = 5373,
OpTensorLayoutSetStrideNV = 5374,
OpTensorLayoutSliceNV = 5375,
OpTensorLayoutSetClampValueNV = 5376,
OpCreateTensorViewNV = 5377,
OpTensorViewSetDimensionNV = 5378,
OpTensorViewSetStrideNV = 5379,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpTensorViewSetClipNV = 5382,
OpTensorLayoutSetBlockSizeNV = 5384,
OpCooperativeMatrixTransposeNV = 5390,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
@ -1911,6 +2075,19 @@ spv = {
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpRawAccessChainNV = 5398,
OpRayQueryGetIntersectionSpherePositionNV = 5427,
OpRayQueryGetIntersectionSphereRadiusNV = 5428,
OpRayQueryGetIntersectionLSSPositionsNV = 5429,
OpRayQueryGetIntersectionLSSRadiiNV = 5430,
OpRayQueryGetIntersectionLSSHitValueNV = 5431,
OpHitObjectGetSpherePositionNV = 5432,
OpHitObjectGetSphereRadiusNV = 5433,
OpHitObjectGetLSSPositionsNV = 5434,
OpHitObjectGetLSSRadiiNV = 5435,
OpHitObjectIsSphereHitNV = 5436,
OpHitObjectIsLSSHitNV = 5437,
OpRayQueryIsSphereHitNV = 5438,
OpRayQueryIsLSSHitNV = 5439,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -2157,7 +2334,14 @@ spv = {
OpConvertBF16ToFINTEL = 6117,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpArithmeticFenceEXT = 6145,
OpSubgroupBlockPrefetchINTEL = 6221,
OpSubgroup2DBlockLoadINTEL = 6231,
OpSubgroup2DBlockLoadTransformINTEL = 6232,
OpSubgroup2DBlockLoadTransposeINTEL = 6233,
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,

188
include/vulkan/spirv-headers/spirv.py
View file

@ -12,7 +12,7 @@
#
# MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
# STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
# HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
# HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
#
# THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -65,6 +65,7 @@ spv = {
'WGSL' : 10,
'Slang' : 11,
'Zig' : 12,
'Rust' : 13,
},
'ExecutionModel' : {
@ -161,6 +162,7 @@ spv = {
'EarlyAndLateFragmentTestsAMD' : 5017,
'StencilRefReplacingEXT' : 5027,
'CoalescingAMDX' : 5069,
'IsApiEntryAMDX' : 5070,
'MaxNodeRecursionAMDX' : 5071,
'StaticNumWorkgroupsAMDX' : 5072,
'ShaderIndexAMDX' : 5073,
@ -173,6 +175,7 @@ spv = {
'StencilRefLessBackAMD' : 5084,
'QuadDerivativesKHR' : 5088,
'RequireFullQuadsKHR' : 5089,
'SharesInputWithAMDX' : 5102,
'OutputLinesEXT' : 5269,
'OutputLinesNV' : 5269,
'OutputPrimitivesEXT' : 5270,
@ -225,7 +228,6 @@ spv = {
'StorageBuffer' : 12,
'TileImageEXT' : 4172,
'NodePayloadAMDX' : 5068,
'NodeOutputPayloadAMDX' : 5076,
'CallableDataKHR' : 5328,
'CallableDataNV' : 5328,
'IncomingCallableDataKHR' : 5329,
@ -525,6 +527,10 @@ spv = {
'NodeMaxPayloadsAMDX' : 5020,
'TrackFinishWritingAMDX' : 5078,
'PayloadNodeNameAMDX' : 5091,
'PayloadNodeBaseIndexAMDX' : 5098,
'PayloadNodeSparseArrayAMDX' : 5099,
'PayloadNodeArraySizeAMDX' : 5100,
'PayloadDispatchIndirectAMDX' : 5105,
'OverrideCoverageNV' : 5248,
'PassthroughNV' : 5250,
'ViewportRelativeNV' : 5252,
@ -687,7 +693,7 @@ spv = {
'BaryCoordSmoothSampleAMD' : 4997,
'BaryCoordPullModelAMD' : 4998,
'FragStencilRefEXT' : 5014,
'CoalescedInputCountAMDX' : 5021,
'RemainingRecursionLevelsAMDX' : 5021,
'ShaderIndexAMDX' : 5073,
'ViewportMaskNV' : 5253,
'SecondaryPositionNV' : 5257,
@ -747,12 +753,19 @@ spv = {
'IncomingRayFlagsKHR' : 5351,
'IncomingRayFlagsNV' : 5351,
'RayGeometryIndexKHR' : 5352,
'HitIsSphereNV' : 5359,
'HitIsLSSNV' : 5360,
'HitSpherePositionNV' : 5361,
'WarpsPerSMNV' : 5374,
'SMCountNV' : 5375,
'WarpIDNV' : 5376,
'SMIDNV' : 5377,
'HitLSSPositionsNV' : 5396,
'HitKindFrontFacingMicroTriangleNV' : 5405,
'HitKindBackFacingMicroTriangleNV' : 5406,
'HitSphereRadiusNV' : 5420,
'HitLSSRadiiNV' : 5421,
'ClusterIDNV' : 5436,
'CullMaskKHR' : 6021,
},
@ -817,6 +830,7 @@ spv = {
'DontInline' : 1,
'Pure' : 2,
'Const' : 3,
'OptNoneEXT' : 16,
'OptNoneINTEL' : 16,
},
@ -826,6 +840,7 @@ spv = {
'DontInline' : 0x00000002,
'Pure' : 0x00000004,
'Const' : 0x00000008,
'OptNoneEXT' : 0x00010000,
'OptNoneINTEL' : 0x00010000,
},
@ -1122,9 +1137,20 @@ spv = {
'ShaderInvocationReorderNV' : 5383,
'BindlessTextureNV' : 5390,
'RayQueryPositionFetchKHR' : 5391,
'CooperativeVectorNV' : 5394,
'AtomicFloat16VectorNV' : 5404,
'RayTracingDisplacementMicromapNV' : 5409,
'RawAccessChainsNV' : 5414,
'RayTracingSpheresGeometryNV' : 5418,
'RayTracingLinearSweptSpheresGeometryNV' : 5419,
'CooperativeMatrixReductionsNV' : 5430,
'CooperativeMatrixConversionsNV' : 5431,
'CooperativeMatrixPerElementOperationsNV' : 5432,
'CooperativeMatrixTensorAddressingNV' : 5433,
'CooperativeMatrixBlockLoadsNV' : 5434,
'CooperativeVectorTrainingNV' : 5435,
'RayTracingClusterAccelerationStructureNV' : 5437,
'TensorAddressingNV' : 5439,
'SubgroupShuffleINTEL' : 5568,
'SubgroupBufferBlockIOINTEL' : 5569,
'SubgroupImageBlockIOINTEL' : 5570,
@ -1184,11 +1210,13 @@ spv = {
'AtomicFloat32AddEXT' : 6033,
'AtomicFloat64AddEXT' : 6034,
'LongCompositesINTEL' : 6089,
'OptNoneEXT' : 6094,
'OptNoneINTEL' : 6094,
'AtomicFloat16AddEXT' : 6095,
'DebugInfoModuleINTEL' : 6114,
'BFloat16ConversionINTEL' : 6115,
'SplitBarrierINTEL' : 6141,
'ArithmeticFenceEXT' : 6144,
'FPGAClusterAttributesV2INTEL' : 6150,
'FPGAKernelAttributesv2INTEL' : 6161,
'FPMaxErrorINTEL' : 6169,
@ -1197,6 +1225,10 @@ spv = {
'GlobalVariableHostAccessINTEL' : 6187,
'GlobalVariableFPGADecorationsINTEL' : 6189,
'SubgroupBufferPrefetchINTEL' : 6220,
'Subgroup2DBlockIOINTEL' : 6228,
'Subgroup2DBlockTransformINTEL' : 6229,
'Subgroup2DBlockTransposeINTEL' : 6230,
'SubgroupMatrixMultiplyAccumulateINTEL' : 6236,
'GroupUniformArithmeticKHR' : 6400,
'MaskedGatherScatterINTEL' : 6427,
'CacheControlsINTEL' : 6441,
@ -1212,6 +1244,7 @@ spv = {
'CullFrontFacingTrianglesKHR' : 5,
'CullOpaqueKHR' : 6,
'CullNoOpaqueKHR' : 7,
'SkipBuiltinPrimitivesNV' : 8,
'SkipTrianglesKHR' : 8,
'SkipAABBsKHR' : 9,
'ForceOpacityMicromap2StateEXT' : 10,
@ -1227,6 +1260,7 @@ spv = {
'CullFrontFacingTrianglesKHR' : 0x00000020,
'CullOpaqueKHR' : 0x00000040,
'CullNoOpaqueKHR' : 0x00000080,
'SkipBuiltinPrimitivesNV' : 0x00000100,
'SkipTrianglesKHR' : 0x00000100,
'SkipAABBsKHR' : 0x00000200,
'ForceOpacityMicromap2StateEXT' : 0x00000400,
@ -1326,6 +1360,38 @@ spv = {
'MatrixAccumulatorKHR' : 2,
},
'CooperativeMatrixReduceShift' : {
'Row' : 0,
'Column' : 1,
'CooperativeMatrixReduce2x2' : 2,
},
'CooperativeMatrixReduceMask' : {
'MaskNone' : 0,
'Row' : 0x00000001,
'Column' : 0x00000002,
'CooperativeMatrixReduce2x2' : 0x00000004,
},
'TensorClampMode' : {
'Undefined' : 0,
'Constant' : 1,
'ClampToEdge' : 2,
'Repeat' : 3,
'RepeatMirrored' : 4,
},
'TensorAddressingOperandsShift' : {
'TensorView' : 0,
'DecodeFunc' : 1,
},
'TensorAddressingOperandsMask' : {
'MaskNone' : 0,
'TensorView' : 0x00000001,
'DecodeFunc' : 0x00000002,
},
'InitializationModeQualifier' : {
'InitOnDeviceReprogramINTEL' : 0,
'InitOnDeviceResetINTEL' : 1,
@ -1357,6 +1423,41 @@ spv = {
'AutoINTEL' : 0,
},
'MatrixMultiplyAccumulateOperandsShift' : {
'MatrixASignedComponentsINTEL' : 0,
'MatrixBSignedComponentsINTEL' : 1,
'MatrixCBFloat16INTEL' : 2,
'MatrixResultBFloat16INTEL' : 3,
'MatrixAPackedInt8INTEL' : 4,
'MatrixBPackedInt8INTEL' : 5,
'MatrixAPackedInt4INTEL' : 6,
'MatrixBPackedInt4INTEL' : 7,
'MatrixATF32INTEL' : 8,
'MatrixBTF32INTEL' : 9,
'MatrixAPackedFloat16INTEL' : 10,
'MatrixBPackedFloat16INTEL' : 11,
'MatrixAPackedBFloat16INTEL' : 12,
'MatrixBPackedBFloat16INTEL' : 13,
},
'MatrixMultiplyAccumulateOperandsMask' : {
'MaskNone' : 0,
'MatrixASignedComponentsINTEL' : 0x00000001,
'MatrixBSignedComponentsINTEL' : 0x00000002,
'MatrixCBFloat16INTEL' : 0x00000004,
'MatrixResultBFloat16INTEL' : 0x00000008,
'MatrixAPackedInt8INTEL' : 0x00000010,
'MatrixBPackedInt8INTEL' : 0x00000020,
'MatrixAPackedInt4INTEL' : 0x00000040,
'MatrixBPackedInt4INTEL' : 0x00000080,
'MatrixATF32INTEL' : 0x00000100,
'MatrixBTF32INTEL' : 0x00000200,
'MatrixAPackedFloat16INTEL' : 0x00000400,
'MatrixBPackedFloat16INTEL' : 0x00000800,
'MatrixAPackedBFloat16INTEL' : 0x00001000,
'MatrixBPackedBFloat16INTEL' : 0x00002000,
},
'RawAccessChainOperandsShift' : {
'RobustnessPerComponentNV' : 0,
'RobustnessPerElementNV' : 1,
@ -1371,6 +1472,31 @@ spv = {
'FPEncoding' : {
},
'CooperativeVectorMatrixLayout' : {
'RowMajorNV' : 0,
'ColumnMajorNV' : 1,
'InferencingOptimalNV' : 2,
'TrainingOptimalNV' : 3,
},
'ComponentType' : {
'Float16NV' : 0,
'Float32NV' : 1,
'Float64NV' : 2,
'SignedInt8NV' : 3,
'SignedInt16NV' : 4,
'SignedInt32NV' : 5,
'SignedInt64NV' : 6,
'UnsignedInt8NV' : 7,
'UnsignedInt16NV' : 8,
'UnsignedInt32NV' : 9,
'UnsignedInt64NV' : 10,
'SignedInt8PackedNV' : 1000491000,
'UnsignedInt8PackedNV' : 1000491001,
'FloatE4M3NV' : 1000491002,
'FloatE5M2NV' : 1000491003,
},
'Op' : {
'OpNop' : 0,
'OpUndef' : 1,
@ -1787,9 +1913,14 @@ spv = {
'OpFragmentMaskFetchAMD' : 5011,
'OpFragmentFetchAMD' : 5012,
'OpReadClockKHR' : 5056,
'OpFinalizeNodePayloadsAMDX' : 5075,
'OpAllocateNodePayloadsAMDX' : 5074,
'OpEnqueueNodePayloadsAMDX' : 5075,
'OpTypeNodePayloadArrayAMDX' : 5076,
'OpFinishWritingNodePayloadAMDX' : 5078,
'OpInitializeNodePayloadsAMDX' : 5090,
'OpNodePayloadArrayLengthAMDX' : 5090,
'OpIsNodePayloadValidAMDX' : 5101,
'OpConstantStringAMDX' : 5103,
'OpSpecConstantStringAMDX' : 5104,
'OpGroupNonUniformQuadAllKHR' : 5110,
'OpGroupNonUniformQuadAnyKHR' : 5111,
'OpHitObjectRecordHitMotionNV' : 5249,
@ -1826,12 +1957,20 @@ spv = {
'OpReorderThreadWithHintNV' : 5280,
'OpTypeHitObjectNV' : 5281,
'OpImageSampleFootprintNV' : 5283,
'OpTypeCooperativeVectorNV' : 5288,
'OpCooperativeVectorMatrixMulNV' : 5289,
'OpCooperativeVectorOuterProductAccumulateNV' : 5290,
'OpCooperativeVectorReduceSumAccumulateNV' : 5291,
'OpCooperativeVectorMatrixMulAddNV' : 5292,
'OpCooperativeMatrixConvertNV' : 5293,
'OpEmitMeshTasksEXT' : 5294,
'OpSetMeshOutputsEXT' : 5295,
'OpGroupNonUniformPartitionNV' : 5296,
'OpWritePackedPrimitiveIndices4x8NV' : 5299,
'OpFetchMicroTriangleVertexPositionNV' : 5300,
'OpFetchMicroTriangleVertexBarycentricNV' : 5301,
'OpCooperativeVectorLoadNV' : 5302,
'OpCooperativeVectorStoreNV' : 5303,
'OpReportIntersectionKHR' : 5334,
'OpReportIntersectionNV' : 5334,
'OpIgnoreIntersectionNV' : 5335,
@ -1843,6 +1982,8 @@ spv = {
'OpTypeAccelerationStructureKHR' : 5341,
'OpTypeAccelerationStructureNV' : 5341,
'OpExecuteCallableNV' : 5344,
'OpRayQueryGetClusterIdNV' : 5345,
'OpHitObjectGetClusterIdNV' : 5346,
'OpTypeCooperativeMatrixNV' : 5358,
'OpCooperativeMatrixLoadNV' : 5359,
'OpCooperativeMatrixStoreNV' : 5360,
@ -1850,9 +1991,26 @@ spv = {
'OpCooperativeMatrixLengthNV' : 5362,
'OpBeginInvocationInterlockEXT' : 5364,
'OpEndInvocationInterlockEXT' : 5365,
'OpCooperativeMatrixReduceNV' : 5366,
'OpCooperativeMatrixLoadTensorNV' : 5367,
'OpCooperativeMatrixStoreTensorNV' : 5368,
'OpCooperativeMatrixPerElementOpNV' : 5369,
'OpTypeTensorLayoutNV' : 5370,
'OpTypeTensorViewNV' : 5371,
'OpCreateTensorLayoutNV' : 5372,
'OpTensorLayoutSetDimensionNV' : 5373,
'OpTensorLayoutSetStrideNV' : 5374,
'OpTensorLayoutSliceNV' : 5375,
'OpTensorLayoutSetClampValueNV' : 5376,
'OpCreateTensorViewNV' : 5377,
'OpTensorViewSetDimensionNV' : 5378,
'OpTensorViewSetStrideNV' : 5379,
'OpDemoteToHelperInvocation' : 5380,
'OpDemoteToHelperInvocationEXT' : 5380,
'OpIsHelperInvocationEXT' : 5381,
'OpTensorViewSetClipNV' : 5382,
'OpTensorLayoutSetBlockSizeNV' : 5384,
'OpCooperativeMatrixTransposeNV' : 5390,
'OpConvertUToImageNV' : 5391,
'OpConvertUToSamplerNV' : 5392,
'OpConvertImageToUNV' : 5393,
@ -1861,6 +2019,19 @@ spv = {
'OpConvertSampledImageToUNV' : 5396,
'OpSamplerImageAddressingModeNV' : 5397,
'OpRawAccessChainNV' : 5398,
'OpRayQueryGetIntersectionSpherePositionNV' : 5427,
'OpRayQueryGetIntersectionSphereRadiusNV' : 5428,
'OpRayQueryGetIntersectionLSSPositionsNV' : 5429,
'OpRayQueryGetIntersectionLSSRadiiNV' : 5430,
'OpRayQueryGetIntersectionLSSHitValueNV' : 5431,
'OpHitObjectGetSpherePositionNV' : 5432,
'OpHitObjectGetSphereRadiusNV' : 5433,
'OpHitObjectGetLSSPositionsNV' : 5434,
'OpHitObjectGetLSSRadiiNV' : 5435,
'OpHitObjectIsSphereHitNV' : 5436,
'OpHitObjectIsLSSHitNV' : 5437,
'OpRayQueryIsSphereHitNV' : 5438,
'OpRayQueryIsLSSHitNV' : 5439,
'OpSubgroupShuffleINTEL' : 5571,
'OpSubgroupShuffleDownINTEL' : 5572,
'OpSubgroupShuffleUpINTEL' : 5573,
@ -2107,7 +2278,14 @@ spv = {
'OpConvertBF16ToFINTEL' : 6117,
'OpControlBarrierArriveINTEL' : 6142,
'OpControlBarrierWaitINTEL' : 6143,
'OpArithmeticFenceEXT' : 6145,
'OpSubgroupBlockPrefetchINTEL' : 6221,
'OpSubgroup2DBlockLoadINTEL' : 6231,
'OpSubgroup2DBlockLoadTransformINTEL' : 6232,
'OpSubgroup2DBlockLoadTransposeINTEL' : 6233,
'OpSubgroup2DBlockPrefetchINTEL' : 6234,
'OpSubgroup2DBlockStoreINTEL' : 6235,
'OpSubgroupMatrixMultiplyAccumulateINTEL' : 6237,
'OpGroupIMulKHR' : 6401,
'OpGroupFMulKHR' : 6402,
'OpGroupBitwiseAndKHR' : 6403,

203
include/vulkan/spirv-headers/spv.d
View file

@ -13,7 +13,7 @@
+
+ MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
+ STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
+ HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
+ HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
+
+ THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
@ -73,6 +73,7 @@ enum SourceLanguage : uint
WGSL = 10,
Slang = 11,
Zig = 12,
Rust = 13,
Max = 0x7fffffff,
}
@ -177,6 +178,7 @@ enum ExecutionMode : uint
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
CoalescingAMDX = 5069,
IsApiEntryAMDX = 5070,
MaxNodeRecursionAMDX = 5071,
StaticNumWorkgroupsAMDX = 5072,
ShaderIndexAMDX = 5073,
@ -189,6 +191,7 @@ enum ExecutionMode : uint
StencilRefLessBackAMD = 5084,
QuadDerivativesKHR = 5088,
RequireFullQuadsKHR = 5089,
SharesInputWithAMDX = 5102,
OutputLinesEXT = 5269,
OutputLinesNV = 5269,
OutputPrimitivesEXT = 5270,
@ -243,7 +246,6 @@ enum StorageClass : uint
StorageBuffer = 12,
TileImageEXT = 4172,
NodePayloadAMDX = 5068,
NodeOutputPayloadAMDX = 5076,
CallableDataKHR = 5328,
CallableDataNV = 5328,
IncomingCallableDataKHR = 5329,
@ -571,6 +573,10 @@ enum Decoration : uint
NodeMaxPayloadsAMDX = 5020,
TrackFinishWritingAMDX = 5078,
PayloadNodeNameAMDX = 5091,
PayloadNodeBaseIndexAMDX = 5098,
PayloadNodeSparseArrayAMDX = 5099,
PayloadNodeArraySizeAMDX = 5100,
PayloadDispatchIndirectAMDX = 5105,
OverrideCoverageNV = 5248,
PassthroughNV = 5250,
ViewportRelativeNV = 5252,
@ -735,7 +741,7 @@ enum BuiltIn : uint
BaryCoordSmoothSampleAMD = 4997,
BaryCoordPullModelAMD = 4998,
FragStencilRefEXT = 5014,
CoalescedInputCountAMDX = 5021,
RemainingRecursionLevelsAMDX = 5021,
ShaderIndexAMDX = 5073,
ViewportMaskNV = 5253,
SecondaryPositionNV = 5257,
@ -795,12 +801,19 @@ enum BuiltIn : uint
IncomingRayFlagsKHR = 5351,
IncomingRayFlagsNV = 5351,
RayGeometryIndexKHR = 5352,
HitIsSphereNV = 5359,
HitIsLSSNV = 5360,
HitSpherePositionNV = 5361,
WarpsPerSMNV = 5374,
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
HitLSSPositionsNV = 5396,
HitKindFrontFacingMicroTriangleNV = 5405,
HitKindBackFacingMicroTriangleNV = 5406,
HitSphereRadiusNV = 5420,
HitLSSRadiiNV = 5421,
ClusterIDNV = 5436,
CullMaskKHR = 6021,
Max = 0x7fffffff,
}
@ -873,6 +886,7 @@ enum FunctionControlShift : uint
DontInline = 1,
Pure = 2,
Const = 3,
OptNoneEXT = 16,
OptNoneINTEL = 16,
Max = 0x7fffffff,
}
@ -884,6 +898,7 @@ enum FunctionControlMask : uint
DontInline = 0x00000002,
Pure = 0x00000004,
Const = 0x00000008,
OptNoneEXT = 0x00010000,
OptNoneINTEL = 0x00010000,
}
@ -1196,9 +1211,20 @@ enum Capability : uint
ShaderInvocationReorderNV = 5383,
BindlessTextureNV = 5390,
RayQueryPositionFetchKHR = 5391,
CooperativeVectorNV = 5394,
AtomicFloat16VectorNV = 5404,
RayTracingDisplacementMicromapNV = 5409,
RawAccessChainsNV = 5414,
RayTracingSpheresGeometryNV = 5418,
RayTracingLinearSweptSpheresGeometryNV = 5419,
CooperativeMatrixReductionsNV = 5430,
CooperativeMatrixConversionsNV = 5431,
CooperativeMatrixPerElementOperationsNV = 5432,
CooperativeMatrixTensorAddressingNV = 5433,
CooperativeMatrixBlockLoadsNV = 5434,
CooperativeVectorTrainingNV = 5435,
RayTracingClusterAccelerationStructureNV = 5437,
TensorAddressingNV = 5439,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1258,11 +1284,13 @@ enum Capability : uint
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
OptNoneEXT = 6094,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
ArithmeticFenceEXT = 6144,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
@ -1271,6 +1299,10 @@ enum Capability : uint
GlobalVariableHostAccessINTEL = 6187,
GlobalVariableFPGADecorationsINTEL = 6189,
SubgroupBufferPrefetchINTEL = 6220,
Subgroup2DBlockIOINTEL = 6228,
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
GroupUniformArithmeticKHR = 6400,
MaskedGatherScatterINTEL = 6427,
CacheControlsINTEL = 6441,
@ -1288,6 +1320,7 @@ enum RayFlagsShift : uint
CullFrontFacingTrianglesKHR = 5,
CullOpaqueKHR = 6,
CullNoOpaqueKHR = 7,
SkipBuiltinPrimitivesNV = 8,
SkipTrianglesKHR = 8,
SkipAABBsKHR = 9,
ForceOpacityMicromap2StateEXT = 10,
@ -1305,6 +1338,7 @@ enum RayFlagsMask : uint
CullFrontFacingTrianglesKHR = 0x00000020,
CullOpaqueKHR = 0x00000040,
CullNoOpaqueKHR = 0x00000080,
SkipBuiltinPrimitivesNV = 0x00000100,
SkipTrianglesKHR = 0x00000100,
SkipAABBsKHR = 0x00000200,
ForceOpacityMicromap2StateEXT = 0x00000400,
@ -1430,6 +1464,46 @@ enum CooperativeMatrixUse : uint
Max = 0x7fffffff,
}
enum CooperativeMatrixReduceShift : uint
{
Row = 0,
Column = 1,
_2x2 = 2,
Max = 0x7fffffff,
}
enum CooperativeMatrixReduceMask : uint
{
MaskNone = 0,
Row = 0x00000001,
Column = 0x00000002,
_2x2 = 0x00000004,
}
enum TensorClampMode : uint
{
Undefined = 0,
Constant = 1,
ClampToEdge = 2,
Repeat = 3,
RepeatMirrored = 4,
Max = 0x7fffffff,
}
enum TensorAddressingOperandsShift : uint
{
TensorView = 0,
DecodeFunc = 1,
Max = 0x7fffffff,
}
enum TensorAddressingOperandsMask : uint
{
MaskNone = 0,
TensorView = 0x00000001,
DecodeFunc = 0x00000002,
}
enum InitializationModeQualifier : uint
{
InitOnDeviceReprogramINTEL = 0,
@ -1471,6 +1545,44 @@ enum NamedMaximumNumberOfRegisters : uint
Max = 0x7fffffff,
}
enum MatrixMultiplyAccumulateOperandsShift : uint
{
MatrixASignedComponentsINTEL = 0,
MatrixBSignedComponentsINTEL = 1,
MatrixCBFloat16INTEL = 2,
MatrixResultBFloat16INTEL = 3,
MatrixAPackedInt8INTEL = 4,
MatrixBPackedInt8INTEL = 5,
MatrixAPackedInt4INTEL = 6,
MatrixBPackedInt4INTEL = 7,
MatrixATF32INTEL = 8,
MatrixBTF32INTEL = 9,
MatrixAPackedFloat16INTEL = 10,
MatrixBPackedFloat16INTEL = 11,
MatrixAPackedBFloat16INTEL = 12,
MatrixBPackedBFloat16INTEL = 13,
Max = 0x7fffffff,
}
enum MatrixMultiplyAccumulateOperandsMask : uint
{
MaskNone = 0,
MatrixASignedComponentsINTEL = 0x00000001,
MatrixBSignedComponentsINTEL = 0x00000002,
MatrixCBFloat16INTEL = 0x00000004,
MatrixResultBFloat16INTEL = 0x00000008,
MatrixAPackedInt8INTEL = 0x00000010,
MatrixBPackedInt8INTEL = 0x00000020,
MatrixAPackedInt4INTEL = 0x00000040,
MatrixBPackedInt4INTEL = 0x00000080,
MatrixATF32INTEL = 0x00000100,
MatrixBTF32INTEL = 0x00000200,
MatrixAPackedFloat16INTEL = 0x00000400,
MatrixBPackedFloat16INTEL = 0x00000800,
MatrixAPackedBFloat16INTEL = 0x00001000,
MatrixBPackedBFloat16INTEL = 0x00002000,
}
enum RawAccessChainOperandsShift : uint
{
RobustnessPerComponentNV = 0,
@ -1490,6 +1602,35 @@ enum FPEncoding : uint
Max = 0x7fffffff,
}
enum CooperativeVectorMatrixLayout : uint
{
RowMajorNV = 0,
ColumnMajorNV = 1,
InferencingOptimalNV = 2,
TrainingOptimalNV = 3,
Max = 0x7fffffff,
}
enum ComponentType : uint
{
Float16NV = 0,
Float32NV = 1,
Float64NV = 2,
SignedInt8NV = 3,
SignedInt16NV = 4,
SignedInt32NV = 5,
SignedInt64NV = 6,
UnsignedInt8NV = 7,
UnsignedInt16NV = 8,
UnsignedInt32NV = 9,
UnsignedInt64NV = 10,
SignedInt8PackedNV = 1000491000,
UnsignedInt8PackedNV = 1000491001,
FloatE4M3NV = 1000491002,
FloatE5M2NV = 1000491003,
Max = 0x7fffffff,
}
enum Op : uint
{
OpNop = 0,
@ -1907,9 +2048,14 @@ enum Op : uint
OpFragmentMaskFetchAMD = 5011,
OpFragmentFetchAMD = 5012,
OpReadClockKHR = 5056,
OpFinalizeNodePayloadsAMDX = 5075,
OpAllocateNodePayloadsAMDX = 5074,
OpEnqueueNodePayloadsAMDX = 5075,
OpTypeNodePayloadArrayAMDX = 5076,
OpFinishWritingNodePayloadAMDX = 5078,
OpInitializeNodePayloadsAMDX = 5090,
OpNodePayloadArrayLengthAMDX = 5090,
OpIsNodePayloadValidAMDX = 5101,
OpConstantStringAMDX = 5103,
OpSpecConstantStringAMDX = 5104,
OpGroupNonUniformQuadAllKHR = 5110,
OpGroupNonUniformQuadAnyKHR = 5111,
OpHitObjectRecordHitMotionNV = 5249,
@ -1946,12 +2092,20 @@ enum Op : uint
OpReorderThreadWithHintNV = 5280,
OpTypeHitObjectNV = 5281,
OpImageSampleFootprintNV = 5283,
OpTypeCooperativeVectorNV = 5288,
OpCooperativeVectorMatrixMulNV = 5289,
OpCooperativeVectorOuterProductAccumulateNV = 5290,
OpCooperativeVectorReduceSumAccumulateNV = 5291,
OpCooperativeVectorMatrixMulAddNV = 5292,
OpCooperativeMatrixConvertNV = 5293,
OpEmitMeshTasksEXT = 5294,
OpSetMeshOutputsEXT = 5295,
OpGroupNonUniformPartitionNV = 5296,
OpWritePackedPrimitiveIndices4x8NV = 5299,
OpFetchMicroTriangleVertexPositionNV = 5300,
OpFetchMicroTriangleVertexBarycentricNV = 5301,
OpCooperativeVectorLoadNV = 5302,
OpCooperativeVectorStoreNV = 5303,
OpReportIntersectionKHR = 5334,
OpReportIntersectionNV = 5334,
OpIgnoreIntersectionNV = 5335,
@ -1963,6 +2117,8 @@ enum Op : uint
OpTypeAccelerationStructureKHR = 5341,
OpTypeAccelerationStructureNV = 5341,
OpExecuteCallableNV = 5344,
OpRayQueryGetClusterIdNV = 5345,
OpHitObjectGetClusterIdNV = 5346,
OpTypeCooperativeMatrixNV = 5358,
OpCooperativeMatrixLoadNV = 5359,
OpCooperativeMatrixStoreNV = 5360,
@ -1970,9 +2126,26 @@ enum Op : uint
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpCooperativeMatrixReduceNV = 5366,
OpCooperativeMatrixLoadTensorNV = 5367,
OpCooperativeMatrixStoreTensorNV = 5368,
OpCooperativeMatrixPerElementOpNV = 5369,
OpTypeTensorLayoutNV = 5370,
OpTypeTensorViewNV = 5371,
OpCreateTensorLayoutNV = 5372,
OpTensorLayoutSetDimensionNV = 5373,
OpTensorLayoutSetStrideNV = 5374,
OpTensorLayoutSliceNV = 5375,
OpTensorLayoutSetClampValueNV = 5376,
OpCreateTensorViewNV = 5377,
OpTensorViewSetDimensionNV = 5378,
OpTensorViewSetStrideNV = 5379,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpTensorViewSetClipNV = 5382,
OpTensorLayoutSetBlockSizeNV = 5384,
OpCooperativeMatrixTransposeNV = 5390,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
@ -1981,6 +2154,19 @@ enum Op : uint
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpRawAccessChainNV = 5398,
OpRayQueryGetIntersectionSpherePositionNV = 5427,
OpRayQueryGetIntersectionSphereRadiusNV = 5428,
OpRayQueryGetIntersectionLSSPositionsNV = 5429,
OpRayQueryGetIntersectionLSSRadiiNV = 5430,
OpRayQueryGetIntersectionLSSHitValueNV = 5431,
OpHitObjectGetSpherePositionNV = 5432,
OpHitObjectGetSphereRadiusNV = 5433,
OpHitObjectGetLSSPositionsNV = 5434,
OpHitObjectGetLSSRadiiNV = 5435,
OpHitObjectIsSphereHitNV = 5436,
OpHitObjectIsLSSHitNV = 5437,
OpRayQueryIsSphereHitNV = 5438,
OpRayQueryIsLSSHitNV = 5439,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -2227,7 +2413,14 @@ enum Op : uint
OpConvertBF16ToFINTEL = 6117,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpArithmeticFenceEXT = 6145,
OpSubgroupBlockPrefetchINTEL = 6221,
OpSubgroup2DBlockLoadINTEL = 6231,
OpSubgroup2DBlockLoadTransformINTEL = 6232,
OpSubgroup2DBlockLoadTransposeINTEL = 6233,
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,