7 commits

Author	SHA1	Message	Date
Zhang Jingqiang Working	0b67587d83	increase MSRV to 1.70 (#72) ... * increase MSRV to 1.70 * g3bench: use IsTerminal in stdlib --------- Co-authored-by: Zhang Jingqiang <zh_jq@outlook.com>	2023-06-02 10:28:24 +08:00
Zhang Jingqiang	3e84294b0c	move cpu affinity code to g3-compat	2023-05-30 10:21:20 +08:00
Zhang Jingqiang	0d27b459f7	only compile with systemd journal on linux	2023-05-27 16:13:25 +08:00
Zhang Jingqiang	282bbf16bd	use workspace level dependency info for local libs	2023-05-05 11:05:04 +08:00
zhangjingqiang	df978f445e	use workspace level dependencies	2023-04-04 17:47:07 +08:00
zhangjingqiang	03122e9a18	batch add cargo license metadata	2023-04-04 11:17:55 +08:00
zhangjingqiang	13716f4923	initial commit	2023-03-09 17:55:45 +08:00