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9-layer QEMU testing platform (ADR-061) and YAML-driven swarm configurator (ADR-062) for ESP32-S3 firmware testing without hardware. 12 commits, 56 files, +9,500 lines. Tested on Windows with Espressif QEMU 9.0.0 — firmware boots, mock CSI generates frames, 14/16 validation checks pass. 39 bugs found and fixed across 2 deep code reviews. Closes #259 Co-Authored-By: claude-flow <ruv@ruv.net>
217 lines
6.2 KiB
C
217 lines
6.2 KiB
C
/**
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* @file fuzz_edge_enqueue.c
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* @brief libFuzzer target for edge_enqueue_csi() (ADR-061 Layer 6).
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*
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* Rapid-fire enqueues with varying iq_len from 0 to beyond
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* EDGE_MAX_IQ_BYTES, testing the SPSC ring buffer overflow behavior
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* and verifying no out-of-bounds writes occur.
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*
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* Build (Linux/macOS with clang):
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* make fuzz_edge
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*
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* Run:
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* ./fuzz_edge corpus/ -max_len=4096
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*/
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#include "esp_stubs.h"
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/*
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* We cannot include edge_processing.c directly because it references
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* FreeRTOS task creation and other ESP-IDF APIs in edge_processing_init().
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* Instead, we re-implement the SPSC ring buffer and edge_enqueue_csi()
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* logic identically to the production code, testing the same algorithm.
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*/
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include <stdlib.h>
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/* ---- Reproduce the ring buffer from edge_processing.h ---- */
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#define EDGE_RING_SLOTS 16
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#define EDGE_MAX_IQ_BYTES 1024
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#define EDGE_MAX_SUBCARRIERS 128
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typedef struct {
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uint8_t iq_data[EDGE_MAX_IQ_BYTES];
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uint16_t iq_len;
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int8_t rssi;
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uint8_t channel;
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uint32_t timestamp_us;
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} fuzz_ring_slot_t;
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typedef struct {
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fuzz_ring_slot_t slots[EDGE_RING_SLOTS];
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volatile uint32_t head;
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volatile uint32_t tail;
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} fuzz_ring_buf_t;
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static fuzz_ring_buf_t s_ring;
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/**
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* ring_push: identical logic to edge_processing.c::ring_push().
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* This is the code path exercised by edge_enqueue_csi().
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*/
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static bool ring_push(const uint8_t *iq, uint16_t len,
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int8_t rssi, uint8_t channel)
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{
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uint32_t next = (s_ring.head + 1) % EDGE_RING_SLOTS;
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if (next == s_ring.tail) {
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return false; /* Full. */
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}
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fuzz_ring_slot_t *slot = &s_ring.slots[s_ring.head];
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uint16_t copy_len = (len > EDGE_MAX_IQ_BYTES) ? EDGE_MAX_IQ_BYTES : len;
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memcpy(slot->iq_data, iq, copy_len);
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slot->iq_len = copy_len;
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slot->rssi = rssi;
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slot->channel = channel;
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slot->timestamp_us = (uint32_t)(esp_timer_get_time() & 0xFFFFFFFF);
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__sync_synchronize();
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s_ring.head = next;
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return true;
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}
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/**
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* ring_pop: identical logic to edge_processing.c::ring_pop().
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*/
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static bool ring_pop(fuzz_ring_slot_t *out)
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{
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if (s_ring.tail == s_ring.head) {
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return false;
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}
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memcpy(out, &s_ring.slots[s_ring.tail], sizeof(fuzz_ring_slot_t));
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__sync_synchronize();
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s_ring.tail = (s_ring.tail + 1) % EDGE_RING_SLOTS;
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return true;
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}
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/**
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* Canary pattern: write to a buffer zone after ring memory to detect
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* out-of-bounds writes. If the canary is overwritten, we trap.
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*/
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#define CANARY_SIZE 64
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#define CANARY_BYTE 0xCD
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static uint8_t s_canary_before[CANARY_SIZE];
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/* s_ring is between the canaries (static allocation order not guaranteed,
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* but ASAN will catch OOB writes regardless). */
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static uint8_t s_canary_after[CANARY_SIZE];
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static void init_canaries(void)
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{
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memset(s_canary_before, CANARY_BYTE, CANARY_SIZE);
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memset(s_canary_after, CANARY_BYTE, CANARY_SIZE);
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}
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static void check_canaries(void)
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{
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for (int i = 0; i < CANARY_SIZE; i++) {
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if (s_canary_before[i] != CANARY_BYTE) __builtin_trap();
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if (s_canary_after[i] != CANARY_BYTE) __builtin_trap();
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}
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}
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int LLVMFuzzerTestOneInput(const uint8_t *data, size_t size)
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{
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if (size < 4) return 0;
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/* Reset ring buffer state for each fuzz iteration. */
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memset(&s_ring, 0, sizeof(s_ring));
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init_canaries();
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const uint8_t *cursor = data;
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size_t remaining = size;
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/*
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* Protocol: each "enqueue command" is:
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* [0..1] iq_len (LE u16)
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* [2] rssi (i8)
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* [3] channel (u8)
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* [4..] iq_data (up to iq_len bytes, zero-padded if short)
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*
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* We consume commands until data is exhausted.
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*/
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uint32_t enqueue_count = 0;
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uint32_t full_count = 0;
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uint32_t pop_count = 0;
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while (remaining >= 4) {
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uint16_t iq_len = (uint16_t)cursor[0] | ((uint16_t)cursor[1] << 8);
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int8_t rssi = (int8_t)cursor[2];
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uint8_t channel = cursor[3];
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cursor += 4;
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remaining -= 4;
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/* Prepare I/Q data buffer.
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* Even if iq_len > EDGE_MAX_IQ_BYTES, we pass it to ring_push
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* which must clamp it internally. We need a source buffer that
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* is at least iq_len bytes to avoid reading OOB. */
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uint8_t iq_buf[EDGE_MAX_IQ_BYTES + 128];
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memset(iq_buf, 0, sizeof(iq_buf));
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/* Copy available fuzz data into iq_buf. */
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uint16_t avail = (remaining > sizeof(iq_buf))
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? (uint16_t)sizeof(iq_buf)
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: (uint16_t)remaining;
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if (avail > 0) {
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memcpy(iq_buf, cursor, avail);
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}
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/* Advance cursor past the I/Q data portion.
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* We consume min(iq_len, remaining) bytes. */
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uint16_t consume = (iq_len > remaining) ? (uint16_t)remaining : iq_len;
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cursor += consume;
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remaining -= consume;
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/* The key test: iq_len can be 0, normal, EDGE_MAX_IQ_BYTES,
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* or larger (up to 65535). ring_push must clamp to EDGE_MAX_IQ_BYTES. */
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bool ok = ring_push(iq_buf, iq_len, rssi, channel);
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if (ok) {
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enqueue_count++;
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} else {
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full_count++;
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/* When ring is full, drain one slot to make room.
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* This tests the interleaved push/pop pattern. */
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fuzz_ring_slot_t popped;
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if (ring_pop(&popped)) {
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pop_count++;
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/* Verify popped data is sane. */
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if (popped.iq_len > EDGE_MAX_IQ_BYTES) {
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__builtin_trap(); /* Clamping failed. */
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}
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}
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/* Retry the enqueue after popping. */
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ring_push(iq_buf, iq_len, rssi, channel);
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}
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/* Periodically check canaries. */
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if ((enqueue_count + full_count) % 8 == 0) {
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check_canaries();
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}
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}
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/* Drain remaining items and verify each. */
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fuzz_ring_slot_t popped;
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while (ring_pop(&popped)) {
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pop_count++;
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if (popped.iq_len > EDGE_MAX_IQ_BYTES) {
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__builtin_trap();
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}
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}
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/* Final canary check. */
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check_canaries();
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/* Verify ring is now empty. */
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if (s_ring.head != s_ring.tail) {
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__builtin_trap();
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}
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return 0;
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}
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