Commit graph

17 commits

Author SHA1 Message Date
Kurtis Heimerl
c4f6641ddb uhd: flush receive buffer should return true on timeout
Receive buffer flush should continue to read until
either the desired number of packets has been read or
timeout, which means that the buffer has been emptied.
These are expected behaviours and should return true.

Ignore errors at this stage as the data and associated
metadata can be considered garbage and not worth
reporting. Actual error conditions will be caught
further downstream when useful data comes in.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2659 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:18:02 +00:00
Kurtis Heimerl
ce5acbf163 uhd: log asynchronous errors as errors
Bump abnormal asynchronous events - basically send errors -
up to ERROR level. These errors are dominated almost
entirely by underflow events, which should not be regularly
occuring.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2656 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:54 +00:00
Kurtis Heimerl
71cec275e8 transceiver: simplify transmit power control
UHD will internally accept floats with a range of +/-1.0,
which corresponds to a 16-bit signed integer range of
apporximately +/- 32000. Set the default amplitude to .3,
which is a safe value agaist saturation elsewhere in the
transmit chain.

The non-UHD maximum amplitude is unchanged at 13500.

Remove digital gain control because it's unnecessary and
causes extra load on enbedded systems.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2654 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:49 +00:00
Kurtis Heimerl
9abb4b57b6 uhd: reorganize error handling, exit when non-recoverable
This is primarily a minor refactor with the exception
of non-recoverable errors - notably if the receive times
out - which almost always requires a reload of the FPGA.
In these cases, quit without trying as resistance is
futile.

ERROR_TIMING:          Soft restart of streaming
ERROR_UNHANDLED:       Benign errors
ERROR_UNRECOVERABLE:   Abandon ship

Non-recoverable behaviour has not been observed in recent
builds, but may exist in older (or future) configurations.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2653 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:46 +00:00
Kurtis Heimerl
68c3894b63 uhd: enable automatic alignment updates
Overnight testing shows that this shouldn't be required
in the majority of cases, but shit happens. Enabling
this forces transmit timing realignment at one minute
intervals. As a fallback method, timing slips not
caught by normal checks will be reset at the update.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2652 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:43 +00:00
Kurtis Heimerl
ae42c765eb uhd: cleanup startup timestamp alignment
At startup, instead of flushing initial packets blindly,
send a stop streaming command, flush, and start. The same
procedure is used in the event of a runtime timestamp
validity error.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2651 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:40 +00:00
Kurtis Heimerl
97046bbdd3 uhd: rework handling of timestamp errors
On a lapses of time monotonicity (and possibly other errors),
stop and restart the receive streaming with a buffer flush
in between. This is a cleaner replacement to the previous
clock reset with that didn't attempt to stop steaming.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2647 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:28 +00:00
Kurtis Heimerl
aa1261f246 uhd: fix timestamp conversion bug on 32-bit architectures
Type size_t was used in the UHD time_spec_t to integer
conversion, which would overflow at roughly 4 and a half
hours causing the sample buffer to error on timestamp
validity. Builds where size_t takes on 64-bits were not
affected by this bug.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2646 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:26 +00:00
Kurtis Heimerl
1509d50221 uhd: reset sample clock when time goes non-monotonic
With UHD b4fc0d61bb6cbd1a5614745bab9aeb0abc22cb6f

Sample clock will reset to zero after an overrun. Earlier
versions may hang the FPGA, which is non-recoverable,
requiring a manual image reload or reboot.

If reset to zero, attempt to kick the sample clock to the
last properly received timestamp value. At this point,
there will be a timing continuity jump, which will drop
connections, but transmit and receive chains should be
aligned allowing for re-establishment.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2645 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:23 +00:00
Kurtis Heimerl
526bf03351 uhd: move static functions into the uhd_device class
Simplifies things slightly, and this is supposed to be
C++ after all.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2643 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:18 +00:00
Kurtis Heimerl
b38839accc uhd: set and shadow settings through interface
Shadow all gains and frequencies, which minimizes device access.
This allows the transceiver to variably control the device
settings.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2640 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:10 +00:00
Kurtis Heimerl
39c6af3709 uhd: set receive gain during initialization
This shouldn't matter much, but the gain settings through the
interface are short circuited right now, which makes this a
problem.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2639 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:07 +00:00
Kurtis Heimerl
2ca69b6ec9 uhd: set hardware side delay offset for e100
The value is used to align transmit and receive time slots within
a sample. This oscilloscope measured value is close, but may
need minor tweaking.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2638 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:05 +00:00
Kurtis Heimerl
6b7f097a3c uhd: log useful information on monotonic errors
Track the current errant and previous timestamp values.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2637 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:02 +00:00
Kurtis Heimerl
66a5f7c299 uhd: only the E100 supports FPGA timestamps and adjustable clock rate
Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2636 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:17:00 +00:00
Kurtis Heimerl
776fe14462 uhd: flush initial receive samples
Occasionally, the E100 will have errant timestamps at start
related to previous sessions. Early packets will be thrown
out anyways, so do this explicitly so the timestamps don't
royally fuck up the sample timing.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2635 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:16:57 +00:00
Kurtis Heimerl
fb986154e8 uhd: add 52 MHz transceiver support
These are mostly identical changes as added to the non-52MHz
implementation with the exception of sample rate.

Signed-off-by: Thomas Tsou <ttsou@vt.edu>

git-svn-id: http://wush.net/svn/range/software/public/openbts/trunk@2634 19bc5d8c-e614-43d4-8b26-e1612bc8e597
2011-11-26 03:16:54 +00:00