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42 lines
1.7 KiB
C
42 lines
1.7 KiB
C
/**
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* @file CompatibilityChecks.h
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* @author Sina Karvandi (sina@hyperdbg.org)
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* @brief Header for checks for processor compatibility with different features
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* @details
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*
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* @version 0.2
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* @date 2023-03-15
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*
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* @copyright This project is released under the GNU Public License v3.
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*
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*/
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#include "pch.h"
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//////////////////////////////////////////////////
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// Structures //
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//////////////////////////////////////////////////
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/**
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* @brief The status of available features in the processor
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*
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*/
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typedef struct _COMPATIBILITY_CHECKS_STATUS
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{
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BOOLEAN IsX2Apic; // X2APIC or XAPIC routine
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BOOLEAN RtmSupport; // check for RTM support
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BOOLEAN PmlSupport; // check Page Modification Logging (PML) support
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BOOLEAN ModeBasedExecutionSupport; // check for mode based execution support (processors after Kaby Lake release will support this feature)
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BOOLEAN ExecuteOnlySupport; // Support for execute-only pages (indicating that data accesses are not allowed while instruction fetches are allowed)
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BOOLEAN CetIbtSupport; // CET IBT support (indicating that indirect branch tracking is supported)
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BOOLEAN CetShadowStackSupport; // CET shadow stack support (indicating that shadow stacks are supported)
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UINT32 VirtualAddressWidth; // Virtual address width for x86 processors
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UINT32 PhysicalAddressWidth; // Physical address width for x86 processors
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} COMPATIBILITY_CHECKS_STATUS, *PCOMPATIBILITY_CHECKS_STATUS;
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//////////////////////////////////////////////////
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// Functions //
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//////////////////////////////////////////////////
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VOID
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CompatibilityCheckPerformChecks();
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