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225 lines
7.8 KiB
C
225 lines
7.8 KiB
C
/**
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* @file Apic.h
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* @author Sina Karvandi (sina@hyperdbg.org)
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* @brief Headers relating to Advanced Programmable Interrupt Controller (APIC)
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* @details Some of the constants are copied from KVM project
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* @version 0.1
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* @date 2020-12-31
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*
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* @copyright This project is released under the GNU Public License v3.
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*
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*/
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#pragma once
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//////////////////////////////////////////////////
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// Definition //
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//////////////////////////////////////////////////
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#define X2_MSR_BASE 0x800
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#define ICROffset 0x300
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#define TO_X2(x) (x / 0x10)
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#define APIC_DEFAULT_PHYS_BASE 0xfee00000
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#define APIC_BSP (1UL << 8)
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#define APIC_EXTD (1UL << 10)
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#define APIC_EN (1UL << 11)
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#define APIC_LVR 0x30
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#define APIC_LVR_MASK 0xFF00FF
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#define GET_APIC_VERSION(x) ((x) & 0xFFu)
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#define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu)
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#define APIC_INTEGRATED(x) (1)
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#define APIC_XAPIC(x) ((x) >= 0x14)
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#define APIC_TASKPRI 0x80
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#define APIC_TPRI_MASK 0xFFu
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#define APIC_ARBPRI 0x90
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#define APIC_ARBPRI_MASK 0xFFu
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#define APIC_PROCPRI 0xA0
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#define APIC_EIO_ACK 0x0
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#define APIC_RRR 0xC0
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#define APIC_LDR 0xD0
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#define APIC_LDR_MASK (0xFFu << 24)
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#define GET_APIC_LOGICAL_ID(x) (((x) >> 24) & 0xFFu)
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#define SET_APIC_LOGICAL_ID(x) (((x) << 24))
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#define APIC_ALL_CPUS 0xFFu
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#define APIC_DFR 0xE0
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#define APIC_DFR_CLUSTER 0x0FFFFFFFul
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#define APIC_DFR_FLAT 0xFFFFFFFFul
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#define APIC_SPIV 0xF0
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#define APIC_SPIV_FOCUS_DISABLED (1 << 9)
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#define APIC_SPIV_APIC_ENABLED (1 << 8)
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#define APIC_ISR 0x100
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#define APIC_ISR_NR 0x8 /* Number of 32 bit ISR registers. */
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#define APIC_TMR 0x180
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#define APIC_IRR 0x200
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#define APIC_ESR 0x280
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#define APIC_ESR_SEND_CS 0x00001
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#define APIC_ESR_RECV_CS 0x00002
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#define APIC_ESR_SEND_ACC 0x00004
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#define APIC_ESR_RECV_ACC 0x00008
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#define APIC_ESR_SENDILL 0x00020
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#define APIC_ESR_RECVILL 0x00040
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#define APIC_ESR_ILLREGA 0x00080
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#define APIC_CMCI 0x2F0
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#define APIC_ICR 0x300
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#define APIC_DEST_SELF 0x40000
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#define APIC_DEST_ALLINC 0x80000
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#define APIC_DEST_ALLBUT 0xC0000
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#define APIC_ICR_RR_MASK 0x30000
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#define APIC_ICR_RR_INVALID 0x00000
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#define APIC_ICR_RR_INPROG 0x10000
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#define APIC_ICR_RR_VALID 0x20000
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#define APIC_INT_LEVELTRIG 0x08000
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#define APIC_INT_ASSERT 0x04000
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#define APIC_ICR_BUSY 0x01000
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#define APIC_DEST_LOGICAL 0x00800
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#define APIC_DEST_PHYSICAL 0x00000
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#define APIC_DM_FIXED 0x00000
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#define APIC_DM_LOWEST 0x00100
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#define APIC_DM_SMI 0x00200
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#define APIC_DM_REMRD 0x00300
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#define APIC_DM_NMI 0x00400
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#define APIC_DM_INIT 0x00500
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#define APIC_DM_STARTUP 0x00600
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#define APIC_DM_EXTINT 0x00700
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#define APIC_VECTOR_MASK 0x000FF
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#define APIC_ICR2 0x310
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#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
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#define SET_APIC_DEST_FIELD(x) ((x) << 24)
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#define APIC_LVTT 0x320
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#define APIC_LVTTHMR 0x330
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#define APIC_LVTPC 0x340
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#define APIC_LVT0 0x350
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#define APIC_LVT_TIMER_BASE_MASK (0x3 << 18)
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#define GET_APIC_TIMER_BASE(x) (((x) >> 18) & 0x3)
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#define SET_APIC_TIMER_BASE(x) (((x) << 18))
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#define APIC_TIMER_BASE_CLKIN 0x0
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#define APIC_TIMER_BASE_TMBASE 0x1
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#define APIC_TIMER_BASE_DIV 0x2
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#define APIC_LVT_TIMER_MASK (3 << 17)
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#define APIC_LVT_TIMER_ONESHOT (0 << 17)
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#define APIC_LVT_TIMER_PERIODIC (1 << 17)
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#define APIC_LVT_TIMER_TSCDEADLINE (2 << 17)
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#define APIC_LVT_MASKED (1 << 16)
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#define APIC_LVT_LEVEL_TRIGGER (1 << 15)
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#define APIC_LVT_REMOTE_IRR (1 << 14)
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#define APIC_INPUT_POLARITY (1 << 13)
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#define APIC_SEND_PENDING (1 << 12)
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#define APIC_MODE_MASK 0x700
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#define GET_APIC_DELIVERY_MODE(x) (((x) >> 8) & 0x7)
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#define SET_APIC_DELIVERY_MODE(x, y) (((x) & ~0x700) | ((y) << 8))
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#define APIC_MODE_FIXED 0x0
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#define APIC_MODE_NMI 0x4
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#define APIC_MODE_EXTINT 0x7
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#define APIC_LVT1 0x360
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#define APIC_LVTERR 0x370
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#define APIC_TMICT 0x380
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#define APIC_TMCCT 0x390
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#define APIC_TDCR 0x3E0
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#define APIC_SELF_IPI 0x3F0
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#define APIC_TDR_DIV_TMBASE (1 << 2)
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#define APIC_TDR_DIV_1 0xB
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#define APIC_TDR_DIV_2 0x0
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#define APIC_TDR_DIV_4 0x1
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#define APIC_TDR_DIV_8 0x2
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#define APIC_TDR_DIV_16 0x3
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#define APIC_TDR_DIV_32 0x8
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#define APIC_TDR_DIV_64 0x9
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#define APIC_TDR_DIV_128 0xA
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#define APIC_EILVT0 0x500
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#define APIC_EILVT_NR_AMD_K8 1 /* # of extended interrupts */
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#define APIC_EILVT_NR_AMD_10H 4
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#define APIC_EILVT_LVTOFF(x) (((x) >> 4) & 0xF)
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#define APIC_EILVT_MSG_FIX 0x0
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#define APIC_EILVT_MSG_SMI 0x2
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#define APIC_EILVT_MSG_NMI 0x4
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#define APIC_EILVT_MSG_EXT 0x7
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#define APIC_EILVT_MASKED (1 << 16)
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#define APIC_EILVT1 0x510
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#define APIC_EILVT2 0x520
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#define APIC_EILVT3 0x530
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#define APIC_BASE_MSR 0x800
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#define APIC_BASE_MSR 0x800
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//////////////////////////////////////////////////
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// I/O APIC //
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//////////////////////////////////////////////////
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typedef struct _IO_APIC_ENT
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{
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UINT32 Reg;
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UINT32 Pad[3];
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UINT32 Data;
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} IO_APIC_ENT, *PIO_APIC_ENT;
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#define IO_APIC_DEFAULT_BASE_ADDR 0xFEC00000 // Default physical address of IO APIC
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#define IOAPIC_APPEND_QWORD(hi, lo) (((UINT64)(hi) << 32) | (UINT64)(lo))
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#define IOAPIC_LOW_DWORD(x) ((UINT32)(x))
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#define IOAPIC_HIGH_DWORD(x) ((UINT32)((x) >> 32))
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#define IOAPIC_REDTBL(x) (0x10 + (x) * 2)
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#define IOAPIC_REDTBL_MAX (24)
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#define LU_SIZE 0x400
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#define LU_ID_REGISTER 0x00000020
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#define LU_VERS_REGISTER 0x00000030
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#define LU_TPR 0x00000080
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#define LU_APR 0x00000090
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#define LU_PPR 0x000000A0
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#define LU_EOI 0x000000B0
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#define LU_REMOTE_REGISTER 0x000000C0
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#define LU_DEST 0x000000D0
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#define LU_DEST_FORMAT 0x000000E0
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#define LU_SPURIOUS_VECTOR 0x000000F0
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#define LU_FAULT_VECTOR 0x00000370
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#define LU_ISR_0 0x00000100
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#define LU_TMR_0 0x00000180
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#define LU_IRR_0 0x00000200
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#define LU_ERROR_STATUS 0x00000280
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#define LU_INT_CMD_LOW 0x00000300
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#define LU_INT_CMD_HIGH 0x00000310
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#define LU_TIMER_VECTOR 0x00000320
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#define LU_INT_VECTOR_0 0x00000350
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#define LU_INT_VECTOR_1 0x00000360
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#define LU_INITIAL_COUNT 0x00000380
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#define LU_CURRENT_COUNT 0x00000390
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#define LU_DIVIDER_CONFIG 0x000003E0
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#define IO_REGISTER_SELECT 0x00000000
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#define IO_REGISTER_WINDOW 0x00000010
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#define IO_ID_REGISTER 0x00000000
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#define IO_VERS_REGISTER 0x00000001
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#define IO_ARB_ID_REGISTER 0x00000002
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#define IO_REDIR_BASE 0x00000010
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//////////////////////////////////////////////////
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// Functions //
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//////////////////////////////////////////////////
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BOOLEAN
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ApicInitialize();
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VOID
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ApicUninitialize();
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BOOLEAN
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ApicStoreLocalApicFields(PLAPIC_PAGE LApicBuffer, PBOOLEAN IsUsingX2APIC);
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BOOLEAN
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ApicStoreIoApicFields(IO_APIC_ENTRY_PACKETS * IoApicPackets);
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VOID
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ApicSelfIpi(UINT32 Vector);
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VOID
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ApicTriggerGenericNmi();
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